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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-07-25 23:05:39 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-07-25 23:06:02 -0700 |
| commit | 3fa12e5225c8c0f661b9e7c668e6e2d899e1b2f1 (patch) | |
| tree | 45ef1d21577e42a19f29b8b23efd8c92fbfeecf1 /isa | |
| parent | c31d7c5eb4109fdcce58d27b132e20596ece2d07 (diff) | |
| download | riscv-tests-3fa12e5225c8c0f661b9e7c668e6e2d899e1b2f1.zip riscv-tests-3fa12e5225c8c0f661b9e7c668e6e2d899e1b2f1.tar.gz riscv-tests-3fa12e5225c8c0f661b9e7c668e6e2d899e1b2f1.tar.bz2 | |
Remove JALR static hints
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/rv32ui/Makefrag | 2 | ||||
| -rw-r--r-- | isa/rv64ui/Makefrag | 2 | ||||
| -rw-r--r-- | isa/rv64ui/jalr_j.S | 86 | ||||
| -rw-r--r-- | isa/rv64ui/jalr_r.S | 86 |
4 files changed, 2 insertions, 174 deletions
diff --git a/isa/rv32ui/Makefrag b/isa/rv32ui/Makefrag index b14f5a7..f01c0e1 100644 --- a/isa/rv32ui/Makefrag +++ b/isa/rv32ui/Makefrag @@ -10,7 +10,7 @@ rv32ui_sc_tests = \ #beq bge bgeu blt bltu bne \ #div divu \ #fence_i \ - #j jal jalr jalr_j jalr_r \ + #j jal jalr \ #lb lbu lh lhu lw \ #lui \ #mul mulh mulhsu mulhu \ diff --git a/isa/rv64ui/Makefrag b/isa/rv64ui/Makefrag index 4877f63..45b86a2 100644 --- a/isa/rv64ui/Makefrag +++ b/isa/rv64ui/Makefrag @@ -12,7 +12,7 @@ rv64ui_sc_tests = \ div divu divuw divw \ example simple \ fence_i \ - j jal jalr jalr_j jalr_r \ + j jal jalr \ lb lbu lh lhu lw lwu ld \ lui \ mul mulh mulhsu mulhu mulw \ diff --git a/isa/rv64ui/jalr_j.S b/isa/rv64ui/jalr_j.S deleted file mode 100644 index 5a7b069..0000000 --- a/isa/rv64ui/jalr_j.S +++ /dev/null @@ -1,86 +0,0 @@ -#***************************************************************************** -# jalr_j.S -#----------------------------------------------------------------------------- -# -# Test jalr.j instruction. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV64U -RVTEST_CODE_BEGIN - - #------------------------------------------------------------- - # Test 2: Basic test - #------------------------------------------------------------- - -test_2: - li x28, 2 - li x31, 0 - la x2, target_2 - -linkaddr_2: - jalr.j x19, x2, 0 - nop - nop - - j fail - -target_2: - la x1, linkaddr_2 - addi x1, x1, 4 - bne x1, x19, fail - - #------------------------------------------------------------- - # Test 3: Check r0 target and that r31 is not modified - #------------------------------------------------------------- - -test_3: - li x28, 3 - li x31, 0 - la x3, target_3 - -linkaddr_3: - jalr.j x0, x3, 0 - nop - - j fail - -target_3: - bne x31, x0, fail - - #------------------------------------------------------------- - # Bypassing tests - #------------------------------------------------------------- - - TEST_JALR_SRC1_BYPASS( 4, 0, jalr.j ); - TEST_JALR_SRC1_BYPASS( 5, 1, jalr.j ); - TEST_JALR_SRC1_BYPASS( 6, 2, jalr.j ); - - #------------------------------------------------------------- - # Test delay slot instructions not executed nor bypassed - #------------------------------------------------------------- - - TEST_CASE( 7, x1, 3, \ - li x1, 1; \ - la x2, 1f; - jalr.j x19, x2, 0; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ -1: addi x1, x1, 1; \ - addi x1, x1, 1; \ - ) - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END diff --git a/isa/rv64ui/jalr_r.S b/isa/rv64ui/jalr_r.S deleted file mode 100644 index 67a3a9e..0000000 --- a/isa/rv64ui/jalr_r.S +++ /dev/null @@ -1,86 +0,0 @@ -#***************************************************************************** -# jalr_r.S -#----------------------------------------------------------------------------- -# -# Test jalr.r instruction. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV64U -RVTEST_CODE_BEGIN - - #------------------------------------------------------------- - # Test 2: Basic test - #------------------------------------------------------------- - -test_2: - li x28, 2 - li x31, 0 - la x2, target_2 - -linkaddr_2: - jalr.r x19, x2, 0 - nop - nop - - j fail - -target_2: - la x1, linkaddr_2 - addi x1, x1, 4 - bne x1, x19, fail - - #------------------------------------------------------------- - # Test 3: Check r0 target and that r31 is not modified - #------------------------------------------------------------- - -test_3: - li x28, 3 - li x31, 0 - la x3, target_3 - -linkaddr_3: - jalr.r x0, x3, 0 - nop - - j fail - -target_3: - bne x31, x0, fail - - #------------------------------------------------------------- - # Bypassing tests - #------------------------------------------------------------- - - TEST_JALR_SRC1_BYPASS( 4, 0, jalr.r ); - TEST_JALR_SRC1_BYPASS( 5, 1, jalr.r ); - TEST_JALR_SRC1_BYPASS( 6, 2, jalr.r ); - - #------------------------------------------------------------- - # Test delay slot instructions not executed nor bypassed - #------------------------------------------------------------- - - TEST_CASE( 7, x1, 3, \ - li x1, 1; \ - la x2, 1f; - jalr.r x19, x2, 0; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ - addi x1, x1, 1; \ -1: addi x1, x1, 1; \ - addi x1, x1, 1; \ - ) - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END |