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author | Megan Wachs <megan@sifive.com> | 2018-04-27 15:18:57 -0700 |
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committer | GitHub <noreply@github.com> | 2018-04-27 15:18:57 -0700 |
commit | bfa3b7d34bca67435d91786a81c9df8963bcccae (patch) | |
tree | 1a151d654ecc0d060f8d2b5a01a86510b71d3ff8 | |
parent | 5c512f0ad5219802d7fcb483b5779dbe04be0c4d (diff) | |
parent | 8787722890867519a2abb0f170423310fc7718a1 (diff) | |
download | riscv-tests-bfa3b7d34bca67435d91786a81c9df8963bcccae.zip riscv-tests-bfa3b7d34bca67435d91786a81c9df8963bcccae.tar.gz riscv-tests-bfa3b7d34bca67435d91786a81c9df8963bcccae.tar.bz2 |
Merge pull request #125 from riscv/debug-delete-sim
Delete E300Sim.py
-rw-r--r-- | debug/targets/SiFive/Freedom/E300Sim.py | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/debug/targets/SiFive/Freedom/E300Sim.py b/debug/targets/SiFive/Freedom/E300Sim.py deleted file mode 100644 index f9428d0..0000000 --- a/debug/targets/SiFive/Freedom/E300Sim.py +++ /dev/null @@ -1,17 +0,0 @@ -import targets -import testlib - -class E300Hart(targets.Hart): - xlen = 32 - ram = 0x80000000 - ram_size = 256 * 1024 * 1024 - instruction_hardware_breakpoint_count = 2 - link_script_path = "Freedom.lds" - -class E300Sim(targets.Target): - timeout_sec = 6000 - openocd_config_path = "Freedom.cfg" - harts = [E300Hart()] - - def create(self): - return testlib.VcsSim(sim_cmd=self.sim_cmd, debug=False) |