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| author | Megan Wachs <megan@sifive.com> | 2018-04-19 10:46:23 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-04-19 10:46:23 -0700 |
| commit | 8787722890867519a2abb0f170423310fc7718a1 (patch) | |
| tree | 6bb31edaaf6670fc3e40ca82f56b392b797d95f7 | |
| parent | fc8268fb59f0d017073a31a076800c8b7111db93 (diff) | |
| download | riscv-tests-8787722890867519a2abb0f170423310fc7718a1.zip riscv-tests-8787722890867519a2abb0f170423310fc7718a1.tar.gz riscv-tests-8787722890867519a2abb0f170423310fc7718a1.tar.bz2 | |
Delete E300Sim.pydebug-delete-sim
This file is wrong (the .cfg file isn't right) and not used by anything.
| -rw-r--r-- | debug/targets/SiFive/Freedom/E300Sim.py | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/debug/targets/SiFive/Freedom/E300Sim.py b/debug/targets/SiFive/Freedom/E300Sim.py deleted file mode 100644 index f9428d0..0000000 --- a/debug/targets/SiFive/Freedom/E300Sim.py +++ /dev/null @@ -1,17 +0,0 @@ -import targets -import testlib - -class E300Hart(targets.Hart): - xlen = 32 - ram = 0x80000000 - ram_size = 256 * 1024 * 1024 - instruction_hardware_breakpoint_count = 2 - link_script_path = "Freedom.lds" - -class E300Sim(targets.Target): - timeout_sec = 6000 - openocd_config_path = "Freedom.cfg" - harts = [E300Hart()] - - def create(self): - return testlib.VcsSim(sim_cmd=self.sim_cmd, debug=False) |