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path: root/riscv/trap.h
AgeCommit message (Expand)AuthorFilesLines
2020-08-03op: hyperviosr: fix exception code and nameChih-Min Chao1-1/+1
2020-07-08Extend trap classes to pass more informationAnup Patel1-5/+37
2020-03-20ebreak should write mtval with 0, not pcAndrew Waterman1-1/+1
2017-11-27Rename badaddr to tvalAndrew Waterman1-8/+8
2017-11-27Set tval to 0 on traps with no specified tvalAndrew Waterman1-1/+1
2017-03-27Set badaddr=0 on illegal instruction trapsAndrew Waterman1-1/+1
2017-03-27On EBREAK, set badaddr to pcAndrew Waterman1-1/+1
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman1-3/+6
2016-03-02WIP on priv spec v1.9Andrew Waterman1-7/+9
2015-05-09Upgrade to privileged architecture 1.7Andrew Waterman1-2/+5
2015-03-17Merge [shm]call into ecall, [shm]ret into eretAndrew Waterman1-4/+2
2015-03-12Use hcall instead of mcallAndrew Waterman1-0/+1
2015-03-12Update to new privileged specAndrew Waterman1-4/+2
2014-12-04Set badvaddr on instruction page faultsAndrew Waterman1-2/+2
2014-08-25clean up warnings from clangScott Beamer1-1/+1
2014-01-21Use auto-generated trap cause numbersAndrew Waterman1-13/+12
2013-11-05correctly trap when SR_EA is disabledYunsup Lee1-0/+1
2013-10-17add hwacha exception supportYunsup Lee1-3/+1
2013-08-11Instructions are no longer member functionsAndrew Waterman1-26/+49
2013-03-25add BSD licenseAndrew Waterman1-0/+2
2012-03-24new supervisor modeAndrew Waterman1-8/+1
2011-11-11Changed supervisor modeAndrew Waterman1-11/+9
2011-06-19temporary undoing of renamingAndrew Waterman1-0/+44
2011-06-12[sim] renamed to riscv-isa-runAndrew Waterman1-43/+0
2011-05-28[fesvr,xcc,sim] fixed multicore sim for akarosAndrew Waterman1-0/+2
2011-05-18[opcodes,pk,sim] add more vector traps (for #banks, illegal instructions)Yunsup Lee1-3/+3
2011-04-12[sim,pk] fixed minor pk bugs and trap codesAndrew Waterman1-1/+2
2011-04-09[sim] add vector traps to vector instructionsYunsup Lee1-1/+1
2011-04-09[sim,pk] reorganized status registerAndrew Waterman1-1/+1
2011-03-25[xcc,pk,opcodes,sim] updated encoding/insn namesAndrew Waterman1-1/+2
2011-02-04[sim,pk] added interrupt-pending field to cause regAndrew Waterman1-1/+1
2010-09-10[sim, pk] cleaned up exception vectors and FP exc flagsAndrew Waterman1-5/+5
2010-08-04[xcc,pk,sim] Added first part of FP supportAndrew Waterman1-0/+8
2010-07-18Reorganized directory structureAndrew Waterman1-0/+31