index
:
riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
riscv
/
riscv.mk.in
Age
Commit message (
Expand
)
Author
Files
Lines
2022-12-22
Remove non-installed header lists from Makefile fragments
Andrew Waterman
1
-34
/
+0
2022-12-20
Reduce compile time increase introduced by #1189
Andrew Waterman
1
-13
/
+4
2022-12-20
Add logged variants of insn templates
Jerry Zhao
1
-5
/
+13
2022-12-16
Add missing vector_unit.h to install headers list
Jerry Zhao
1
-1
/
+2
2022-12-16
Add missing abstract_interrupt_controller.h to header lists
Jerry Zhao
1
-0
/
+2
2022-12-15
Don't install instruction decode macros
Jerry Zhao
1
-3
/
+1
2022-12-15
Merge pull request #1180 from ucb-bar/cleancfg
Andrew Waterman
1
-0
/
+1
2022-12-15
Add cfg.cc to hold internal implementation of mem_cfg_t
Jerry Zhao
1
-0
/
+1
2022-12-15
Split decode.h into public decode.h and private decode_macros.h
Jerry Zhao
1
-0
/
+1
2022-12-13
Move boost asio socket interface to socketif_t
Jerry Zhao
1
-1
/
+3
2022-12-12
Pull vector unit into separate source/header
Jerry Zhao
1
-0
/
+2
2022-11-17
add support for zcmt
Weiwei Li
1
-0
/
+4
2022-11-17
add support for zcmp
Weiwei Li
1
-0
/
+9
2022-11-17
add support for zcb
Weiwei Li
1
-1
/
+19
2022-10-17
Merge branch 'master' into plic_uart_v1
plic_uart_v1
Andrew Waterman
1
-1
/
+34
2022-09-23
Build and install lib and header dependencies for Hammer
Jerin Joy
1
-1
/
+31
2022-05-16
Include recently added headers in riscv/riscv.mk.in
Pirmin Vogel
1
-0
/
+3
2022-04-20
Add ns16550 serial device emulation
Anup Patel
1
-0
/
+1
2022-04-20
Add PLIC emulation
Anup Patel
1
-0
/
+1
2022-03-30
Create triggers.cc, triggers.h.
Tim Newsome
1
-0
/
+2
2022-03-29
Split isa_parser_t out of processor.* and into its own file (#955)
Rupert Swarbrick
1
-0
/
+1
2022-03-18
Initial step towards factoring out command line configuration
Rupert Swarbrick
1
-0
/
+1
2022-03-17
Inline trap_t methods so they can be used in fesvr code
Andrew Waterman
1
-1
/
+0
2022-02-18
Remove disasm.cc/disasm.h from riscv subproject (#919)
Rupert Swarbrick
1
-2
/
+0
2022-01-30
add instructions function for cmo
liweiwei
1
-0
/
+7
2021-12-27
Update instruction vmandnot.mm, vmornot.mm -> vmandn.mm, vmorn.mm (#896)
Yueh-Ting (eop) Chen
1
-2
/
+2
2021-11-02
Zbkx renames xperm.n and xperm.b as xperm4 and xperm8. (#846)
Markku-Juhani O. Saarinen
1
-4
/
+4
2021-10-14
Split 'P' to EXT_ZPN and friends (#830)
marcfedorow
1
-14
/
+1
2021-09-08
Extract csr_t implementations to separate file
Scott Johnson
1
-0
/
+1
2021-09-08
Extract CSR class hierarchy to new file
Scott Johnson
1
-0
/
+1
2021-08-09
rvv fix 2021-08-09 (#768)
Chih-Min Chao
1
-5
/
+10
2021-08-08
Removed SWAP16 encoding and implementation header. (#766)
marcfedorow
1
-1
/
+0
2021-07-28
Significantly speed up compilation with GCC
Andrew Waterman
1
-2
/
+0
2021-07-20
Priv virtual memory updates (#750)
Daniel Lustig
1
-0
/
+7
2021-06-04
rvv: vdot has been removed
Chih-Min Chao
1
-3
/
+0
2021-06-02
Remove Duff's Device in main simulation loop (#721)
Andrew Waterman
1
-7
/
+0
2021-05-10
Support RISC-V p-ext-proposal v0.9.2 (#637)
ChunPing Chung
1
-0
/
+345
2021-03-08
Merge pull request #649 from ben-marshall/scalar-crypto-fix
Andrew Waterman
1
-4
/
+8
2021-02-24
rvv: add vsetivli
Chih-Min Chao
1
-0
/
+1
2021-02-24
rvv: add vse1/vle1
Chih-Min Chao
1
-0
/
+2
2021-02-23
rvv: rename sqrt/reciprocal instructions
Chih-Min Chao
1
-2
/
+2
2021-02-18
scalar-crypto: Fix decoding of RV64 AES instructions.
Ben Marshall
1
-4
/
+8
2021-02-04
Refactor headers
Andrew Waterman
1
-0
/
+1
2021-01-22
scalar-crypto: Initial spike support for v0.8.1 (#635)
Ben Marshall
1
-0
/
+29
2021-01-17
rvb: add xperm.[nbhw] (#629)
Chih-Min Chao
1
-0
/
+4
2021-01-08
Update Zba/Zbb/Zbc to v0.93; Zbs/Zbe to v0.94-draft
Andrew Waterman
1
-32
/
+19
2020-12-02
rvv: index load/store have benn separated into ordered and unordered parts (#...
Chih-Min Chao
1
-8
/
+12
2020-10-22
Remove subu.w; change addu.w definition
Andrew Waterman
1
-1
/
+0
2020-10-22
[riscv-bitmanip] Add sh[123]add[u.w] instruction
Clifford Wolf
1
-0
/
+6
2020-10-22
[riscv-bitmanip] Changes for RISC-V Bitmanip Spec 0.92
Clifford Wolf
1
-0
/
+5
[next]