| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2020-05-28 | rvv: handle inactive and NaN case for vfredsum | Chih-Min Chao | 1 | -0/+1 |
| 2020-05-04 | rvv: fp16: support reduction instructions | Chih-Min Chao | 1 | -0/+3 |
| 2020-01-09 | rvv: add vfredxxx.vs and vfwred[o]sum.vs float64 support | Chih-Min Chao | 1 | -0/+3 |
| 2019-06-18 | rvv: add floating-point instructions | Chih-Min Chao | 1 | -0/+5 |
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index : riscv-isa-sim.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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