aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2020-12-29Install config.h into include/fesvrAndrew Waterman2-2/+13
2020-12-28Install fesvr/byteorder.h to fix #622Andrew Waterman2-0/+1
2020-12-22rvv: make fractional lmul checking simpler and stricter (#620)Chih-Min Chao2-3/+1
2020-12-18If misaligned accesses are enabled, throw access fault on misaligned LR/SCAndrew Waterman1-2/+20
2020-12-18Merge pull request #619 from mehmetoguzderin/guess-new-arch-2020Andrew Waterman2-1787/+2150
2020-12-18Merge pull request #618 from avpatel/mmu_proc_fix_v1Andrew Waterman3-6/+6
2020-12-18Fix processor_t:take_interrupt() for HS-mode interruptsAnup Patel1-1/+1
2020-12-18Update config file to support aarch64Mehmet Oguz Derin2-1787/+2150
2020-12-18Check and use proc variable in MMU emulationAnup Patel2-5/+5
2020-12-15Add Zba/Zbb to disassemblerAndrew Waterman1-0/+27
2020-12-14Merge pull request #616 from chihminchao/misc-fix-2020-12-14Andrew Waterman4-5/+30
2020-12-14rvv: fix the v[z|s]ext about elmul checking.Dave.Wen1-1/+1
2020-12-14disasm: show fench's predecessor and successorChih-Min Chao2-1/+26
2020-12-14dts: mmu: replace 'riscv,bare' by 'riscv,sbare'Chih-Min Chao2-3/+3
2020-12-13Preserve abstract s0 write if progbuf excepts. (#615)Tim Newsome1-0/+11
2020-12-07Oops...napot_bits should use ctz, not clz (#614)Daniel Lustig1-2/+2
2020-12-04Merge pull request #613 from chihminchao/rvv-fix-2020-12-04Andrew Waterman3-1/+3
2020-12-04rvv: check the vz/sext's eewDave.Wen1-0/+1
2020-12-04rvv: update the fractional lmul checking rule to rvv1.0-draftDave.Wen2-1/+2
2020-12-02rvv: index load/store have benn separated into ordered and unordered parts (#...Chih-Min Chao19-88/+129
2020-12-01Remove stray comma in configureAndrew Waterman2-2/+2
2020-12-01Fix Issue #609 (#610)Will Hawkins1-5/+1
2020-11-29Fix #607: Add a core parameter to the interactive str command (#608)Will Hawkins2-5/+18
2020-11-29Merge pull request #605 from avpatel/riscv_gva_fix_v1Andrew Waterman4-26/+38
2020-11-28Fix typo in HTVAL CSR write emulationAnup Patel1-1/+1
2020-11-27Fix hstatus.GVA and mstatus.GVA updationAnup Patel3-25/+37
2020-11-26Include stdexcept in ELF loader (#603)Daniel Bates1-0/+1
2020-11-23Fix misaligned loads and stores for big endian target (#602)Marcus Comstedt1-2/+2
2020-11-23Fix VSSTATUS bits updation (#568)Anup Patel2-16/+20
2020-11-18Don't include PTE.N bit as part of the PPNAndrew Waterman1-2/+2
2020-11-18Invalid NAPOT settings cause page faults, not access exceptionsAndrew Waterman1-2/+2
2020-11-18Add Zsn extensionAndrew Waterman3-3/+20
2020-11-18Avoid use of __builtin_popcount for portabilityAndrew Waterman6-5/+16
2020-11-18Avoid use of __builtin_ctz for portabilityAndrew Waterman6-14/+39
2020-11-18Avoid use of __builtin_bswap for portabilityAndrew Waterman1-6/+6
2020-11-18Only use __builtin_expect for __GNUC__Andrew Waterman1-2/+7
2020-11-16Fix byteorder issues with struct riscv_stat (#596)Marcus Comstedt1-32/+39
2020-11-16Merge pull request #598 from chihminchao/pmp-per-coreAndrew Waterman3-38/+46
2020-11-15dts: config pmp attribute by each core's settingChih-Min Chao3-29/+25
2020-11-15dts: extract cpu node checking as helper functionChih-Min Chao1-9/+21
2020-11-12Correct AMO exception cause for misaligned accesses (#594)Scott Johnson1-0/+3
2020-11-12Merge pull request #592 from scottj97/fix-misaligned-lrAndrew Waterman3-8/+8
2020-11-12Merge pull request #593 from chihminchao/selective-mmu-modeAndrew Waterman7-31/+194
2020-11-11dts: mmu: parse mmu-type in dtsChih-Min Chao1-0/+48
2020-11-11dts: extend dts api to get info of each cpuChih-Min Chao2-0/+43
2020-11-11mmu: check mmu supportChih-Min Chao2-9/+39
2020-11-11mmu: extract common part of satp and vsatp settingChih-Min Chao2-25/+21
2020-11-11mmu: add impl table and set functionChih-Min Chao3-1/+47
2020-11-11Use new require_alignment flag to simplify AMO checkScott Johnson1-3/+1
2020-11-11Make LR properly take misaligned exceptionScott Johnson3-6/+8
generated by cgit v1.1 at 2024-08-16 12:38:50 +0000