diff options
38 files changed, 45 insertions, 53 deletions
diff --git a/riscv/insns/c_add.h b/riscv/insns/c_add.h index ab7d4d4..796e634 100644 --- a/riscv/insns/c_add.h +++ b/riscv/insns/c_add.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_rs2() != 0); WRITE_RD(sext_xlen(RVC_RS1 + RVC_RS2)); diff --git a/riscv/insns/c_addi.h b/riscv/insns/c_addi.h index eb98344..62d0639 100644 --- a/riscv/insns/c_addi.h +++ b/riscv/insns/c_addi.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RD(sext_xlen(RVC_RS1 + insn.rvc_imm())); diff --git a/riscv/insns/c_addi4spn.h b/riscv/insns/c_addi4spn.h index e5f3832..a1d5425 100644 --- a/riscv/insns/c_addi4spn.h +++ b/riscv/insns/c_addi4spn.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_addi4spn_imm() != 0); WRITE_RVC_RS2S(sext_xlen(RVC_SP + insn.rvc_addi4spn_imm())); diff --git a/riscv/insns/c_addw.h b/riscv/insns/c_addw.h index 6e0ae3a..bd64b1e 100644 --- a/riscv/insns/c_addw.h +++ b/riscv/insns/c_addw.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require_rv64; WRITE_RVC_RS1S(sext32(RVC_RS1S + RVC_RS2S)); diff --git a/riscv/insns/c_and.h b/riscv/insns/c_and.h index 4d7bab6..9054e05 100644 --- a/riscv/insns/c_and.h +++ b/riscv/insns/c_and.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS1S(RVC_RS1S & RVC_RS2S); diff --git a/riscv/insns/c_andi.h b/riscv/insns/c_andi.h index 9de5a1a..156e440 100644 --- a/riscv/insns/c_andi.h +++ b/riscv/insns/c_andi.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS1S(RVC_RS1S & insn.rvc_imm()); diff --git a/riscv/insns/c_beqz.h b/riscv/insns/c_beqz.h index 35c1196..65bdcf6 100644 --- a/riscv/insns/c_beqz.h +++ b/riscv/insns/c_beqz.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); if (RVC_RS1S == 0) set_pc(pc + insn.rvc_b_imm()); diff --git a/riscv/insns/c_bnez.h b/riscv/insns/c_bnez.h index 1e40ea7..2a2e9a9 100644 --- a/riscv/insns/c_bnez.h +++ b/riscv/insns/c_bnez.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); if (RVC_RS1S != 0) set_pc(pc + insn.rvc_b_imm()); diff --git a/riscv/insns/c_ebreak.h b/riscv/insns/c_ebreak.h index c8cc1f5..14b5136 100644 --- a/riscv/insns/c_ebreak.h +++ b/riscv/insns/c_ebreak.h @@ -1,4 +1,4 @@ -require_extension('C'); +require_extension(EXT_ZCA); if (!STATE.debug_mode && ((STATE.prv == PRV_M && STATE.dcsr->ebreakm) || (STATE.prv == PRV_S && STATE.dcsr->ebreaks) || diff --git a/riscv/insns/c_fld.h b/riscv/insns/c_fld.h index b009ac2..dac1738 100644 --- a/riscv/insns/c_fld.h +++ b/riscv/insns/c_fld.h @@ -1,4 +1,3 @@ -require_extension('C'); -require_extension('D'); +require_extension(EXT_ZCD); require_fp; WRITE_RVC_FRS2S(f64(MMU.load<uint64_t>(RVC_RS1S + insn.rvc_ld_imm()))); diff --git a/riscv/insns/c_fldsp.h b/riscv/insns/c_fldsp.h index 20cad57..b49a88a 100644 --- a/riscv/insns/c_fldsp.h +++ b/riscv/insns/c_fldsp.h @@ -1,4 +1,3 @@ -require_extension('C'); -require_extension('D'); +require_extension(EXT_ZCD); require_fp; WRITE_FRD(f64(MMU.load<uint64_t>(RVC_SP + insn.rvc_ldsp_imm()))); diff --git a/riscv/insns/c_flw.h b/riscv/insns/c_flw.h index f073a85..95ae260 100644 --- a/riscv/insns/c_flw.h +++ b/riscv/insns/c_flw.h @@ -1,8 +1,8 @@ -require_extension('C'); if (xlen == 32) { - require_extension('F'); + require_extension(EXT_ZCF); require_fp; WRITE_RVC_FRS2S(f32(MMU.load<uint32_t>(RVC_RS1S + insn.rvc_lw_imm()))); } else { // c.ld + require_extension(EXT_ZCA); WRITE_RVC_RS2S(MMU.load<int64_t>(RVC_RS1S + insn.rvc_ld_imm())); } diff --git a/riscv/insns/c_flwsp.h b/riscv/insns/c_flwsp.h index a9a4b2c..eea0ec5 100644 --- a/riscv/insns/c_flwsp.h +++ b/riscv/insns/c_flwsp.h @@ -1,9 +1,9 @@ -require_extension('C'); if (xlen == 32) { - require_extension('F'); + require_extension(EXT_ZCF); require_fp; WRITE_FRD(f32(MMU.load<uint32_t>(RVC_SP + insn.rvc_lwsp_imm()))); } else { // c.ldsp + require_extension(EXT_ZCA); require(insn.rvc_rd() != 0); WRITE_RD(MMU.load<int64_t>(RVC_SP + insn.rvc_ldsp_imm())); } diff --git a/riscv/insns/c_fsd.h b/riscv/insns/c_fsd.h index 58c3bcf..d86b47e 100644 --- a/riscv/insns/c_fsd.h +++ b/riscv/insns/c_fsd.h @@ -1,4 +1,3 @@ -require_extension('C'); -require_extension('D'); +require_extension(EXT_ZCD); require_fp; MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_FRS2S.v[0]); diff --git a/riscv/insns/c_fsdsp.h b/riscv/insns/c_fsdsp.h index ebe7995..980dbc4 100644 --- a/riscv/insns/c_fsdsp.h +++ b/riscv/insns/c_fsdsp.h @@ -1,4 +1,3 @@ -require_extension('C'); -require_extension('D'); +require_extension(EXT_ZCD); require_fp; MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_FRS2.v[0]); diff --git a/riscv/insns/c_fsw.h b/riscv/insns/c_fsw.h index 381ab5e..d7d6fed 100644 --- a/riscv/insns/c_fsw.h +++ b/riscv/insns/c_fsw.h @@ -1,8 +1,8 @@ -require_extension('C'); if (xlen == 32) { - require_extension('F'); + require_extension(EXT_ZCF); require_fp; MMU.store<uint32_t>(RVC_RS1S + insn.rvc_lw_imm(), RVC_FRS2S.v[0]); } else { // c.sd + require_extension(EXT_ZCA); MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S); } diff --git a/riscv/insns/c_fswsp.h b/riscv/insns/c_fswsp.h index 9ce408c..5952251 100644 --- a/riscv/insns/c_fswsp.h +++ b/riscv/insns/c_fswsp.h @@ -1,8 +1,8 @@ -require_extension('C'); if (xlen == 32) { - require_extension('F'); + require_extension(EXT_ZCF); require_fp; MMU.store<uint32_t>(RVC_SP + insn.rvc_swsp_imm(), RVC_FRS2.v[0]); } else { // c.sdsp + require_extension(EXT_ZCA); MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2); } diff --git a/riscv/insns/c_j.h b/riscv/insns/c_j.h index 6d8939c..a2712c3 100644 --- a/riscv/insns/c_j.h +++ b/riscv/insns/c_j.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); set_pc(pc + insn.rvc_j_imm()); diff --git a/riscv/insns/c_jal.h b/riscv/insns/c_jal.h index 4f156f6..49e20f4 100644 --- a/riscv/insns/c_jal.h +++ b/riscv/insns/c_jal.h @@ -1,4 +1,4 @@ -require_extension('C'); +require_extension(EXT_ZCA); if (xlen == 32) { reg_t tmp = npc; set_pc(pc + insn.rvc_j_imm()); diff --git a/riscv/insns/c_jalr.h b/riscv/insns/c_jalr.h index cb1e422..0a00f1c 100644 --- a/riscv/insns/c_jalr.h +++ b/riscv/insns/c_jalr.h @@ -1,4 +1,4 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_rs1() != 0); reg_t tmp = npc; set_pc(RVC_RS1 & ~reg_t(1)); diff --git a/riscv/insns/c_jr.h b/riscv/insns/c_jr.h index 9c4a8ea..020cafd 100644 --- a/riscv/insns/c_jr.h +++ b/riscv/insns/c_jr.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_rs1() != 0); set_pc(RVC_RS1 & ~reg_t(1)); diff --git a/riscv/insns/c_li.h b/riscv/insns/c_li.h index f9fd66b..bfe16a2 100644 --- a/riscv/insns/c_li.h +++ b/riscv/insns/c_li.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RD(insn.rvc_imm()); diff --git a/riscv/insns/c_lui.h b/riscv/insns/c_lui.h index 75d8eb8..956fa44 100644 --- a/riscv/insns/c_lui.h +++ b/riscv/insns/c_lui.h @@ -1,4 +1,4 @@ -require_extension('C'); +require_extension(EXT_ZCA); if (insn.rvc_rd() == 2) { // c.addi16sp require(insn.rvc_addi16sp_imm() != 0); WRITE_REG(X_SP, sext_xlen(RVC_SP + insn.rvc_addi16sp_imm())); diff --git a/riscv/insns/c_lw.h b/riscv/insns/c_lw.h index d90cca2..63b708c 100644 --- a/riscv/insns/c_lw.h +++ b/riscv/insns/c_lw.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS2S(MMU.load<int32_t>(RVC_RS1S + insn.rvc_lw_imm())); diff --git a/riscv/insns/c_lwsp.h b/riscv/insns/c_lwsp.h index b4c0b7f..de23cd9 100644 --- a/riscv/insns/c_lwsp.h +++ b/riscv/insns/c_lwsp.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_rd() != 0); WRITE_RD(MMU.load<int32_t>(RVC_SP + insn.rvc_lwsp_imm())); diff --git a/riscv/insns/c_mv.h b/riscv/insns/c_mv.h index a03d0d0..b227005 100644 --- a/riscv/insns/c_mv.h +++ b/riscv/insns/c_mv.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_rs2() != 0); WRITE_RD(RVC_RS2); diff --git a/riscv/insns/c_or.h b/riscv/insns/c_or.h index 56436d1..736ec99 100644 --- a/riscv/insns/c_or.h +++ b/riscv/insns/c_or.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS1S(RVC_RS1S | RVC_RS2S); diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h index 24fbb13..1358d4d 100644 --- a/riscv/insns/c_slli.h +++ b/riscv/insns/c_slli.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_zimm() < xlen); WRITE_RD(sext_xlen(RVC_RS1 << insn.rvc_zimm())); diff --git a/riscv/insns/c_srai.h b/riscv/insns/c_srai.h index f6638b1..8f25e39 100644 --- a/riscv/insns/c_srai.h +++ b/riscv/insns/c_srai.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_zimm() < xlen); WRITE_RVC_RS1S(sext_xlen(sext_xlen(RVC_RS1S) >> insn.rvc_zimm())); diff --git a/riscv/insns/c_srli.h b/riscv/insns/c_srli.h index f410fef..de08031 100644 --- a/riscv/insns/c_srli.h +++ b/riscv/insns/c_srli.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require(insn.rvc_zimm() < xlen); WRITE_RVC_RS1S(sext_xlen(zext_xlen(RVC_RS1S) >> insn.rvc_zimm())); diff --git a/riscv/insns/c_sub.h b/riscv/insns/c_sub.h index 1b8e373..2a9d51b 100644 --- a/riscv/insns/c_sub.h +++ b/riscv/insns/c_sub.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS1S(sext_xlen(RVC_RS1S - RVC_RS2S)); diff --git a/riscv/insns/c_subw.h b/riscv/insns/c_subw.h index 580f5b5..8099973 100644 --- a/riscv/insns/c_subw.h +++ b/riscv/insns/c_subw.h @@ -1,3 +1,3 @@ -require_extension('C'); +require_extension(EXT_ZCA); require_rv64; WRITE_RVC_RS1S(sext32(RVC_RS1S - RVC_RS2S)); diff --git a/riscv/insns/c_sw.h b/riscv/insns/c_sw.h index 43f397f..5fdf4a1 100644 --- a/riscv/insns/c_sw.h +++ b/riscv/insns/c_sw.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); MMU.store<uint32_t>(RVC_RS1S + insn.rvc_lw_imm(), RVC_RS2S); diff --git a/riscv/insns/c_swsp.h b/riscv/insns/c_swsp.h index a01e466..d6684fd 100644 --- a/riscv/insns/c_swsp.h +++ b/riscv/insns/c_swsp.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); MMU.store<uint32_t>(RVC_SP + insn.rvc_swsp_imm(), RVC_RS2); diff --git a/riscv/insns/c_xor.h b/riscv/insns/c_xor.h index 9981c1a..7fd72ec 100644 --- a/riscv/insns/c_xor.h +++ b/riscv/insns/c_xor.h @@ -1,2 +1,2 @@ -require_extension('C'); +require_extension(EXT_ZCA); WRITE_RVC_RS1S(RVC_RS1S ^ RVC_RS2S); diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h index 2bc7f42..227654e 100644 --- a/riscv/overlap_list.h +++ b/riscv/overlap_list.h @@ -1,8 +1,4 @@ -DECLARE_OVERLAP_INSN(c_fsdsp, 'C') -DECLARE_OVERLAP_INSN(c_fsdsp, 'D') -DECLARE_OVERLAP_INSN(c_fld, 'C') -DECLARE_OVERLAP_INSN(c_fld, 'D') -DECLARE_OVERLAP_INSN(c_fldsp, 'C') -DECLARE_OVERLAP_INSN(c_fldsp, 'D') -DECLARE_OVERLAP_INSN(c_fsd, 'C') -DECLARE_OVERLAP_INSN(c_fsd, 'D') +DECLARE_OVERLAP_INSN(c_fsdsp, EXT_ZCD) +DECLARE_OVERLAP_INSN(c_fld, EXT_ZCD) +DECLARE_OVERLAP_INSN(c_fldsp, EXT_ZCD) +DECLARE_OVERLAP_INSN(c_fsd, EXT_ZCD) diff --git a/riscv/processor.cc b/riscv/processor.cc index 02a3086..0c9da97 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -1072,7 +1072,7 @@ void processor_t::register_base_instructions() #include "encoding.h" #undef DECLARE_INSN - #define DECLARE_OVERLAP_INSN(name, ext) { name##_supported &= isa->extension_enabled(ext); } + #define DECLARE_OVERLAP_INSN(name, ext) { name##_supported = isa->extension_enabled(ext); } #include "overlap_list.h" #undef DECLARE_OVERLAP_INSN diff --git a/riscv/processor.h b/riscv/processor.h index 06a92b1..a660399 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -283,7 +283,7 @@ public: return impl_table[impl]; } reg_t pc_alignment_mask() { - return ~(reg_t)(extension_enabled('C') ? 0 : 2); + return ~(reg_t)(extension_enabled(EXT_ZCA) ? 0 : 2); } void check_pc_alignment(reg_t pc) { if (unlikely(pc & ~pc_alignment_mask())) |