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| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | 2022-03-24 23:06:43 +0000 |
|---|---|---|
| committer | Rupert Swarbrick <rswarbrick@lowrisc.org> | 2022-04-12 11:10:56 +0100 |
| commit | 8e70cdfa611b5eb30fba49235aab5ce2cffd4c43 (patch) | |
| tree | f06c5c15748fa8b59b6ea8cad48a91f7a1fbcb18 /riscv | |
| parent | acf88fe13184f397f450b31574fc9f8d7e3944b4 (diff) | |
| download | riscv-isa-sim-8e70cdfa611b5eb30fba49235aab5ce2cffd4c43.zip riscv-isa-sim-8e70cdfa611b5eb30fba49235aab5ce2cffd4c43.tar.gz riscv-isa-sim-8e70cdfa611b5eb30fba49235aab5ce2cffd4c43.tar.bz2 | |
Move real_time_clint into cfg_t
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/cfg.h | 7 | ||||
| -rw-r--r-- | riscv/sim.cc | 4 | ||||
| -rw-r--r-- | riscv/sim.h | 2 |
3 files changed, 8 insertions, 5 deletions
diff --git a/riscv/cfg.h b/riscv/cfg.h index a2c04a7..6369bd8 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -58,7 +58,8 @@ public: const char *default_isa, const char *default_priv, const char *default_varch, const std::vector<mem_cfg_t> &default_mem_layout, - const std::vector<int> default_hartids) + const std::vector<int> default_hartids, + bool default_real_time_clint) : initrd_bounds(default_initrd_bounds), bootargs(default_bootargs), isa(default_isa), @@ -66,7 +67,8 @@ public: varch(default_varch), mem_layout(default_mem_layout), hartids(default_hartids), - explicit_hartids(false) + explicit_hartids(false), + real_time_clint(default_real_time_clint) {} cfg_arg_t<std::pair<reg_t, reg_t>> initrd_bounds; @@ -78,6 +80,7 @@ public: std::optional<reg_t> start_pc; cfg_arg_t<std::vector<int>> hartids; bool explicit_hartids; + cfg_arg_t<bool> real_time_clint; size_t nprocs() const { return hartids().size(); } }; diff --git a/riscv/sim.cc b/riscv/sim.cc index 832be7a..069e1b5 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -28,7 +28,7 @@ static void handle_signal(int sig) signal(sig, &handle_signal); } -sim_t::sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, +sim_t::sim_t(const cfg_t *cfg, bool halted, std::vector<std::pair<reg_t, mem_t*>> mems, std::vector<std::pair<reg_t, abstract_device_t*>> plugin_devices, const std::vector<std::string>& args, @@ -94,7 +94,7 @@ sim_t::sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, // setting the dtb_file argument has one. reg_t clint_base; if (fdt_parse_clint(fdt, &clint_base, "riscv,clint0") == 0) { - clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, real_time_clint)); + clint.reset(new clint_t(procs, CPU_HZ / INSNS_PER_RTC_TICK, cfg->real_time_clint())); bus.add_device(clint_base, clint.get()); } diff --git a/riscv/sim.h b/riscv/sim.h index 4f7a384..97cada1 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -32,7 +32,7 @@ class remote_bitbang_t; class sim_t : public htif_t, public simif_t { public: - sim_t(const cfg_t *cfg, bool halted, bool real_time_clint, + sim_t(const cfg_t *cfg, bool halted, std::vector<std::pair<reg_t, mem_t*>> mems, std::vector<std::pair<reg_t, abstract_device_t*>> plugin_devices, const std::vector<std::string>& args, |