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| author | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-01-04 13:19:53 +0800 |
|---|---|---|
| committer | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-03-06 17:21:00 +0800 |
| commit | 6408a0f61b631bc426cdf0c209a34bd37e8a27fe (patch) | |
| tree | 54632183d317c5f5073e01cec4ab86f9b7c8d293 /riscv | |
| parent | dffd42169bafb625cd30f8c0a9181dbebb85fe56 (diff) | |
| download | riscv-isa-sim-6408a0f61b631bc426cdf0c209a34bd37e8a27fe.zip riscv-isa-sim-6408a0f61b631bc426cdf0c209a34bd37e8a27fe.tar.gz riscv-isa-sim-6408a0f61b631bc426cdf0c209a34bd37e8a27fe.tar.bz2 | |
Zicfilp: Implement lpad insn behavior
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/insns/lpad.h | 6 | ||||
| -rw-r--r-- | riscv/riscv.mk.in | 4 |
2 files changed, 10 insertions, 0 deletions
diff --git a/riscv/insns/lpad.h b/riscv/insns/lpad.h new file mode 100644 index 0000000..733e91d --- /dev/null +++ b/riscv/insns/lpad.h @@ -0,0 +1,6 @@ +if (ZICFILP_xLPE(STATE.v, STATE.prv) && STATE.elp == elp_t::LP_EXPECTED) { + software_check(pc % 4 == 0 && + ((READ_REG(7) & 0xFFFFF000ULL) == (static_cast<uint64_t>(insn.u_imm()) & 0xFFFFF000ULL) || insn.u_imm() == 0LL), + LANDING_PAD_FAULT); + STATE.elp = elp_t::NO_LP_EXPECTED; +} diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index df557f5..0c4a14b 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1392,6 +1392,9 @@ riscv_insn_ext_zimop = \ mop_r_N \ mop_rr_N \ +riscv_insn_ext_zicfilp = \ + lpad + riscv_insn_ext_zvk = \ $(riscv_insn_ext_zvbb) \ $(riscv_insn_ext_zvbc) \ @@ -1431,6 +1434,7 @@ riscv_insn_list = \ $(riscv_insn_smrnmi) \ $(riscv_insn_svinval) \ $(riscv_insn_ext_zimop) \ + $(riscv_insn_ext_zicfilp) \ riscv_gen_srcs = $(addsuffix .cc,$(riscv_insn_list)) |