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| author | Andrew Waterman <andrew@sifive.com> | 2026-04-29 10:58:27 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-04-29 10:58:27 -0700 |
| commit | b21cccdc5f4680d9c13a6bd7d9d00b75aea3cbb5 (patch) | |
| tree | 87c74cdee88663a7d7775799fc0006875a651b4b /riscv/overlap_list.h | |
| parent | 632777d37139298f0af1ee8d2a001f3ab0bde98c (diff) | |
| parent | f2aa295a31f6d0de376e807b2dfab5a62418c8dc (diff) | |
| download | riscv-isa-sim-master.tar.gz riscv-isa-sim-master.tar.bz2 riscv-isa-sim-master.zip | |
rvp for rv32/rv64
Diffstat (limited to 'riscv/overlap_list.h')
| -rw-r--r-- | riscv/overlap_list.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h index 253be457..bf9b72e7 100644 --- a/riscv/overlap_list.h +++ b/riscv/overlap_list.h @@ -32,3 +32,66 @@ DECLARE_OVERLAP_INSN(sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspush_x1, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_mop_N, EXT_ZCMOP) + +// rv64p overlap rv32p +DECLARE_OVERLAP_INSN(paadd_w, 'P') +DECLARE_OVERLAP_INSN(paaddu_w, 'P') +DECLARE_OVERLAP_INSN(pasub_w, 'P') +DECLARE_OVERLAP_INSN(pasubu_w, 'P') +DECLARE_OVERLAP_INSN(psadd_w, 'P') +DECLARE_OVERLAP_INSN(psaddu_w, 'P') +DECLARE_OVERLAP_INSN(pssh1sadd_w, 'P') +DECLARE_OVERLAP_INSN(pssub_w, 'P') +DECLARE_OVERLAP_INSN(pssubu_w, 'P') +DECLARE_OVERLAP_INSN(psati_w, 'P') +DECLARE_OVERLAP_INSN(pusati_w, 'P') +DECLARE_OVERLAP_INSN(psrari_w, 'P') +DECLARE_OVERLAP_INSN(pssha_ws, 'P') +DECLARE_OVERLAP_INSN(psshar_ws, 'P') +DECLARE_OVERLAP_INSN(psslai_w, 'P') +DECLARE_OVERLAP_INSN(pmseq_w, 'P') +DECLARE_OVERLAP_INSN(pmslt_w, 'P') +DECLARE_OVERLAP_INSN(pmsltu_w, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmulh_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmulh_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmulhr_w, 'P') +DECLARE_OVERLAP_INSN(pmulhrsu_w, 'P') +DECLARE_OVERLAP_INSN(pmulhru_w, 'P') +DECLARE_OVERLAP_INSN(pmulhsu_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmulhsu_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmulq_w, 'P') +DECLARE_OVERLAP_INSN(pmulqr_w, 'P') +DECLARE_OVERLAP_INSN(pmulsu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmulsu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmaccsu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmaccsu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmhaccu_w, 'P') +DECLARE_OVERLAP_INSN(pmhracc_w, 'P') +DECLARE_OVERLAP_INSN(pmhraccsu_w, 'P') +DECLARE_OVERLAP_INSN(pmhraccu_w, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h11, 'P') +DECLARE_OVERLAP_INSN(psshl_ws, 'P') +DECLARE_OVERLAP_INSN(psshlr_ws, 'P') |