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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-27 01:59:13 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-28 22:59:58 -0700 |
| commit | 36ebbb068c6508b9e42398b2307b5c5792459395 (patch) | |
| tree | 2d1b05b8ccc8b5d3aa536af9c9f5f124b47df0c2 /riscv/insns/vsuxe_v.h | |
| parent | 3035256f1a451da1dabff677e6e14b13fef7edc1 (diff) | |
| download | riscv-isa-sim-36ebbb068c6508b9e42398b2307b5c5792459395.zip riscv-isa-sim-36ebbb068c6508b9e42398b2307b5c5792459395.tar.gz riscv-isa-sim-36ebbb068c6508b9e42398b2307b5c5792459395.tar.bz2 | |
rvv: add new explicit eew load/store instructions
1. unit
2. stride
3. index
4. fault-first
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vsuxe_v.h')
| -rw-r--r-- | riscv/insns/vsuxe_v.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/riscv/insns/vsuxe_v.h b/riscv/insns/vsuxe_v.h deleted file mode 100644 index 1434876..0000000 --- a/riscv/insns/vsuxe_v.h +++ /dev/null @@ -1,13 +0,0 @@ -// vsuxe.v -reg_t sew = P.VU.vsew; -require(sew >= e8 && sew <= e64); -VI_DUPLICATE_VREG(insn.rs2(), P.VU.vlmax); -if (sew == e8) { - VI_ST_INDEX(index[i], fn, uint8, 1, false); -} else if (sew == e16) { - VI_ST_INDEX(index[i], fn, uint16, 2, false); -} else if (sew == e32) { - VI_ST_INDEX(index[i], fn, uint32, 4, false); -} else if (sew == e64) { - VI_ST_INDEX(index[i], fn, uint64, 8, false); -} |