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| author | Akif Ejaz <81078376+akifejaz@users.noreply.github.com> | 2024-06-12 10:25:11 +0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-12 10:25:11 +0500 |
| commit | 22748de594631552f8b82bb895fcd7c33a91aa18 (patch) | |
| tree | fef9f3669624536805eb93e7e803f2a804e39e60 /riscv/insns/c_sdsp.h | |
| parent | dc8ea5921556e174f0393940465fb0fde99fe680 (diff) | |
| parent | 9e6253f8b13bfd0ded2ececd8b0ac23902e0eac7 (diff) | |
| download | riscv-isa-sim-22748de594631552f8b82bb895fcd7c33a91aa18.zip riscv-isa-sim-22748de594631552f8b82bb895fcd7c33a91aa18.tar.gz riscv-isa-sim-22748de594631552f8b82bb895fcd7c33a91aa18.tar.bz2 | |
Merge branch 'master' into vector-crypto
Diffstat (limited to 'riscv/insns/c_sdsp.h')
| -rw-r--r-- | riscv/insns/c_sdsp.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/insns/c_sdsp.h b/riscv/insns/c_sdsp.h new file mode 100644 index 0000000..f7b8a28 --- /dev/null +++ b/riscv/insns/c_sdsp.h @@ -0,0 +1,2 @@ +require_extension(EXT_ZCA); +MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2); |