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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-08 23:29:41 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-02 12:15:25 -0800 |
| commit | 3cb87f71df753ec08bb8e635ac9016846d67912c (patch) | |
| tree | 582f933bacce022a45e7c97724c577b2ce8fca44 /riscv/decode.h | |
| parent | dd1913e777f97188b0d52318bcd5914a8ba67a12 (diff) | |
| download | riscv-isa-sim-3cb87f71df753ec08bb8e635ac9016846d67912c.zip riscv-isa-sim-3cb87f71df753ec08bb8e635ac9016846d67912c.tar.gz riscv-isa-sim-3cb87f71df753ec08bb8e635ac9016846d67912c.tar.bz2 | |
Fix ERET serialization strategy
It was screwing up the commit log.
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index f8437ca..f4d6b6c 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -200,18 +200,21 @@ private: #define set_pc_and_serialize(x) \ do { set_pc(x); /* check alignment */ \ - npc = PC_SERIALIZE; \ + npc = PC_SERIALIZE_AFTER; \ STATE.pc = (x); \ } while(0) -#define PC_SERIALIZE 3 /* sentinel value indicating simulator pipeline flush */ +/* Sentinel PC values to serialize simulator pipeline */ +#define PC_SERIALIZE_BEFORE 3 +#define PC_SERIALIZE_AFTER 5 +#define invalid_pc(pc) ((pc) & 1) /* Convenience wrappers to simplify softfloat code sequences */ #define f32(x) ((float32_t){(uint32_t)x}) #define f64(x) ((float64_t){(uint64_t)x}) #define validate_csr(which, write) ({ \ - if (!STATE.serialized) return PC_SERIALIZE; \ + if (!STATE.serialized) return PC_SERIALIZE_BEFORE; \ STATE.serialized = false; \ unsigned csr_priv = get_field((which), 0x300); \ unsigned csr_read_only = get_field((which), 0xC00) == 3; \ |