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author | Scott Johnson <scott.johnson@arilinc.com> | 2023-01-02 18:08:56 -0800 |
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committer | GitHub <noreply@github.com> | 2023-01-02 18:08:56 -0800 |
commit | ad5fcd96e9731073c58c64e5fa4fecfd3ad5e8a5 (patch) | |
tree | 982e8ebce664a510ec0247cd835a378c0543a294 /README.md | |
parent | f11c7b64b488a64a613bbc4ba02f83e929998d14 (diff) | |
parent | 9f3372a8e3ee769e229328881a11a620a97495c4 (diff) | |
download | riscv-isa-sim-ad5fcd96e9731073c58c64e5fa4fecfd3ad5e8a5.zip riscv-isa-sim-ad5fcd96e9731073c58c64e5fa4fecfd3ad5e8a5.tar.gz riscv-isa-sim-ad5fcd96e9731073c58c64e5fa4fecfd3ad5e8a5.tar.bz2 |
Merge pull request #1177 from YenHaoChen/pr-mcontrol6
Support mcontrol6 trigger
Diffstat (limited to 'README.md')
-rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -38,7 +38,7 @@ Spike supports the following RISC-V ISA features: - Svpbmt extension, v1.0 - Svinval extension, v1.0 - Debug v0.14 - - 4 triggers support type=2 (mcontrol), type=4 (itrigger), type=5 (etrigger), and type=15 (disabled) + - 4 triggers support type=2 (mcontrol), type=4 (itrigger), type=5 (etrigger), type=6 (mcontrol6), and type=15 (disabled) - Smepmp extension v1.0 - Smstateen extension, v1.0 - Sscofpmf v0.5.2 |