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author | Andrew Waterman <andrew@sifive.com> | 2020-03-23 22:21:43 -0700 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-03-23 22:21:43 -0700 |
commit | c9f2f4a8e8284f81147708e20d104d840807a3d6 (patch) | |
tree | edff7bf568740f04927a4b9c57fee3bd724d503d | |
parent | b4add16f4923a782f79b478d980791ec1d0bee06 (diff) | |
parent | 5a208b28a23fa408d12f91f838564575a4270043 (diff) | |
download | riscv-isa-sim-c9f2f4a8e8284f81147708e20d104d840807a3d6.zip riscv-isa-sim-c9f2f4a8e8284f81147708e20d104d840807a3d6.tar.gz riscv-isa-sim-c9f2f4a8e8284f81147708e20d104d840807a3d6.tar.bz2 |
Merge pull request #425 from chihminchao/rvv-fix-2020-03-17
Rvv fix 2020 03 17
-rw-r--r-- | riscv/decode.h | 4 | ||||
-rw-r--r-- | riscv/execute.cc | 21 | ||||
-rw-r--r-- | riscv/insns/vdiv_vv.h | 2 | ||||
-rw-r--r-- | riscv/insns/vdiv_vx.h | 2 | ||||
-rw-r--r-- | riscv/insns/vmerge_vim.h | 1 | ||||
-rw-r--r-- | riscv/insns/vmerge_vvm.h | 1 | ||||
-rw-r--r-- | riscv/insns/vmerge_vxm.h | 1 | ||||
-rw-r--r-- | riscv/mmu.h | 2 | ||||
-rw-r--r-- | riscv/processor.cc | 4 | ||||
-rw-r--r-- | softfloat/fall_maxmin.c | 20 |
10 files changed, 33 insertions, 25 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 1794475..48079c1 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -457,9 +457,8 @@ static inline bool is_overlapped(const int astart, const int asize, #define VI_CHECK_SXX \ VI_CHECK_STORE_SXX; \ - if (P.VU.vlmul > 1 && insn.v_vm() == 0) { \ + if (insn.v_vm() == 0 && (insn.v_nf() > 0 || P.VU.vlmul > 1)) \ require(insn.rd() != 0); \ - } #define VI_CHECK_DSS(is_vs1) \ VI_WIDE_CHECK_COMMON; \ @@ -806,7 +805,6 @@ static inline bool is_overlapped(const int astart, const int asize, // merge and copy loop #define VI_VVXI_MERGE_LOOP(BODY) \ - VI_CHECK_SXX; \ VI_GENERAL_LOOP_BASE \ if (sew == e8){ \ VXI_PARAMS(e8); \ diff --git a/riscv/execute.cc b/riscv/execute.cc index 12dd781..2d84242 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -4,15 +4,20 @@ #include "mmu.h" #include <cassert> +#ifdef RISCV_ENABLE_COMMITLOG +static void commit_log_reset(processor_t* p) +{ + p->get_state()->log_reg_write.clear(); + p->get_state()->log_mem_read.clear(); + p->get_state()->log_mem_write.clear(); +} static void commit_log_stash_privilege(processor_t* p) { -#ifdef RISCV_ENABLE_COMMITLOG state_t* state = p->get_state(); state->last_inst_priv = state->prv; state->last_inst_xlen = p->get_xlen(); state->last_inst_flen = p->get_flen(); -#endif } static void commit_log_print_value(int width, const void *data) @@ -50,7 +55,6 @@ static void commit_log_print_value(int width, uint64_t hi, uint64_t lo) static void commit_log_print_insn(processor_t* p, reg_t pc, insn_t insn) { -#ifdef RISCV_ENABLE_COMMITLOG auto& reg = p->get_state()->log_reg_write; auto& load = p->get_state()->log_mem_read; auto& store = p->get_state()->log_mem_write; @@ -122,11 +126,12 @@ static void commit_log_print_insn(processor_t* p, reg_t pc, insn_t insn) commit_log_print_value(std::get<2>(item) << 3, 0, std::get<1>(item)); } fprintf(stderr, "\n"); - reg.clear(); - load.clear(); - store.clear(); -#endif } +#else +static void commit_log_reset(processor_t* p) {} +static void commit_log_stash_privilege(processor_t* p) {} +static void commit_log_print_insn(processor_t* p, reg_t pc, insn_t insn) {} +#endif inline void processor_t::update_histogram(reg_t pc) { @@ -140,7 +145,9 @@ inline void processor_t::update_histogram(reg_t pc) // function calls. static reg_t execute_insn(processor_t* p, reg_t pc, insn_fetch_t fetch) { + commit_log_reset(p); commit_log_stash_privilege(p); + reg_t npc = fetch.func(p, fetch.insn, pc); if (npc != PC_SERIALIZE_BEFORE) { if (p->get_log_commits()) { diff --git a/riscv/insns/vdiv_vv.h b/riscv/insns/vdiv_vv.h index 67da162..0d4bd0d 100644 --- a/riscv/insns/vdiv_vv.h +++ b/riscv/insns/vdiv_vv.h @@ -3,7 +3,7 @@ VI_VV_LOOP ({ if (vs1 == 0) vd = -1; - else if (vs2 == -(1 << (sew - 1)) && vs1 == -1) + else if (vs2 == (INT64_MIN >> (64 - sew)) && vs1 == -1) vd = vs2; else vd = vs2 / vs1; diff --git a/riscv/insns/vdiv_vx.h b/riscv/insns/vdiv_vx.h index 1a152bd..4052952 100644 --- a/riscv/insns/vdiv_vx.h +++ b/riscv/insns/vdiv_vx.h @@ -3,7 +3,7 @@ VI_VX_LOOP ({ if(rs1 == 0) vd = -1; - else if(vs2 == -(1 << (sew - 1)) && rs1 == -1) + else if(vs2 == (INT64_MIN >> (64 - sew)) && rs1 == -1) vd = vs2; else vd = vs2 / rs1; diff --git a/riscv/insns/vmerge_vim.h b/riscv/insns/vmerge_vim.h index c6c87c7..6185da5 100644 --- a/riscv/insns/vmerge_vim.h +++ b/riscv/insns/vmerge_vim.h @@ -1,4 +1,5 @@ // vmerge.vim vd, vs2, simm5 +require_vector; VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ diff --git a/riscv/insns/vmerge_vvm.h b/riscv/insns/vmerge_vvm.h index 97a0182..f0a3fd5 100644 --- a/riscv/insns/vmerge_vvm.h +++ b/riscv/insns/vmerge_vvm.h @@ -1,4 +1,5 @@ // vmerge.vvm vd, vs2, vs1 +require_vector; VI_CHECK_SSS(true); VI_VVXI_MERGE_LOOP ({ diff --git a/riscv/insns/vmerge_vxm.h b/riscv/insns/vmerge_vxm.h index de7df91..505b32f 100644 --- a/riscv/insns/vmerge_vxm.h +++ b/riscv/insns/vmerge_vxm.h @@ -1,4 +1,5 @@ // vmerge.vxm vd, vs2, rs1 +require_vector; VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ diff --git a/riscv/mmu.h b/riscv/mmu.h index f73de59..b84fd4a 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -155,8 +155,8 @@ public: } \ else { \ type##_t le_val = to_le(val); \ - if (proc) WRITE_MEM(addr, val, size); \ store_slow_path(addr, sizeof(type##_t), (const uint8_t*)&le_val); \ + if (proc) WRITE_MEM(addr, val, size); \ } \ } diff --git a/riscv/processor.cc b/riscv/processor.cc index 89974b7..7ecdba0 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -812,11 +812,11 @@ void processor_t::set_csr(int which, reg_t val) break; case CSR_VXSAT: dirty_fp_state; - VU.vxsat = val; + VU.vxsat = val & 0x1ul; break; case CSR_VXRM: dirty_fp_state; - VU.vxrm = val; + VU.vxrm = val & 0x3ul; break; } } diff --git a/softfloat/fall_maxmin.c b/softfloat/fall_maxmin.c index 08f1d40..32a9ade 100644 --- a/softfloat/fall_maxmin.c +++ b/softfloat/fall_maxmin.c @@ -45,31 +45,31 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define COMPARE_MAX(a, b, bits) \ float ## bits ## _t f ## bits ## _max( float ## bits ## _t a, float ## bits ## _t b ) \ { \ + bool greater = f ## bits ## _lt_quiet(b, a) || \ + (f ## bits ## _eq(b, a) && signF ## bits ## UI(b.v)); \ + \ if (isNaNF ## bits ## UI(a.v) && isNaNF ## bits ## UI(b.v)) { \ union ui ## bits ## _f ## bits ui; \ ui.ui = defaultNaNF ## bits ## UI; \ return ui.f; \ + } else { \ + return greater || isNaNF ## bits ## UI((b).v) ? a : b; \ } \ - \ - bool greater = f ## bits ## _lt_quiet(b, a) || \ - (f ## bits ## _eq(b, a) && signF ## bits ## UI(b.v)); \ - \ - return greater || isNaNF ## bits ## UI((b).v) ? a : b; \ } #define COMPARE_MIN(a, b, bits) \ float ## bits ## _t f ## bits ## _min( float ## bits ## _t a, float ## bits ## _t b ) \ { \ + bool less = f ## bits ## _lt_quiet(a, b) || \ + (f ## bits ## _eq(a, b) && signF ## bits ## UI(a.v)); \ + \ if (isNaNF ## bits ## UI(a.v) && isNaNF ## bits ## UI(b.v)) { \ union ui ## bits ## _f ## bits ui; \ ui.ui = defaultNaNF ## bits ## UI; \ return ui.f; \ + } else { \ + return less || isNaNF ## bits ## UI((b).v) ? a : b; \ } \ - \ - bool greater = f ## bits ## _lt_quiet(a, b) || \ - (f ## bits ## _eq(a, b) && signF ## bits ## UI(a.v)); \ - \ - return greater || isNaNF ## bits ## UI((b).v) ? a : b; \ } COMPARE_MAX(a, b, 16); |