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| author | Andrew Waterman <andrew@sifive.com> | 2020-02-17 15:45:06 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-02-17 15:45:23 -0800 |
| commit | 77b98bf87e768eeea7aa1f93cb270843e5cb7b2a (patch) | |
| tree | 23f8eaf124d4295557f81f729d42d9b0c57f8a51 | |
| parent | a562fdb3aa567e8c498c9ea2dd0fb2013057dc6e (diff) | |
| download | riscv-isa-sim-77b98bf87e768eeea7aa1f93cb270843e5cb7b2a.zip riscv-isa-sim-77b98bf87e768eeea7aa1f93cb270843e5cb7b2a.tar.gz riscv-isa-sim-77b98bf87e768eeea7aa1f93cb270843e5cb7b2a.tar.bz2 | |
v[f]merge: allow v0 overlap if LMUL = 1
The VI_CHECK_SSS macro enforces the weaker constraint.
| -rw-r--r-- | riscv/insns/vfmerge_vfm.h | 1 | ||||
| -rw-r--r-- | riscv/insns/vmerge_vxm.h | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/riscv/insns/vfmerge_vfm.h b/riscv/insns/vfmerge_vfm.h index b213e06..33dacfa 100644 --- a/riscv/insns/vfmerge_vfm.h +++ b/riscv/insns/vfmerge_vfm.h @@ -1,5 +1,4 @@ // vfmerge_vf vd, vs2, vs1, vm -require(insn.rd() != 0); VI_CHECK_SSS(false); VI_VFP_COMMON; diff --git a/riscv/insns/vmerge_vxm.h b/riscv/insns/vmerge_vxm.h index c0f115c..de7df91 100644 --- a/riscv/insns/vmerge_vxm.h +++ b/riscv/insns/vmerge_vxm.h @@ -1,5 +1,4 @@ // vmerge.vxm vd, vs2, rs1 -require(insn.rd() != 0); VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ |