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BranchCommit messageAuthorAge
device_flagsAllow device flags after --device cmdline argJerry Zhao7 months
dts_parsingSupport parsing procs fully from DTSJerry Zhao2 weeks
dynamicbuild: Dynamically link installed progsJerry Zhao12 months
force-rttibuild: Include all symbols from extension.o when linking spike's mainJerry Zhao12 months
log-commits-fastertmpAndrew Waterman8 months
masterMerge pull request #1726 from YenHaoChen/pr-dcsrAndrew Waterman7 hours
nolibfdtRemove in-tree libfdt, rely on system-installed libfdtJerry Zhao7 months
rivosinc-etrigger_fix_exception_matchCall stash_privilege more selectivelyAndrew Waterman14 months
test-headersCheck in CI that all installed headers are usableAndrew Waterman6 hours
whole-archivebuild: Link spike binaries with --whole-archiveJerry Zhao12 months
[...]
 
TagDownloadAuthorAge
dummy-tag-for-ci-storageriscv-isa-sim-dummy-tag-for-ci-storage.zip  riscv-isa-sim-dummy-tag-for-ci-storage.tar.gz  riscv-isa-sim-dummy-tag-for-ci-storage.tar.bz2  Andrew Waterman22 months
v1.1.0riscv-isa-sim-1.1.0.zip  riscv-isa-sim-1.1.0.tar.gz  riscv-isa-sim-1.1.0.tar.bz2  Andrew Waterman3 years
v1.0.0riscv-isa-sim-1.0.0.zip  riscv-isa-sim-1.0.0.tar.gz  riscv-isa-sim-1.0.0.tar.bz2  Andrew Waterman5 years
 
AgeCommit messageAuthorFilesLines
2021-07-29Enable precompiled headers when using clangtestAndrew Waterman4-3/+136
2021-07-29Significantly speed up compilation of disassemblerAndrew Waterman2-265/+373
2021-07-28Add NORETURN macroAndrew Waterman1-2/+4
2021-07-28Inline execute_insnAndrew Waterman1-1/+1
2021-07-28Significantly speed up compilation with GCCAndrew Waterman6-11/+1
2021-07-28Update disassembly to reflect renamed vector instructionsAndrew Waterman1-5/+5
2021-07-28Update encoding.hAndrew Waterman1-146/+168
2021-07-28Merge pull request #759 from ben-marshall/scalar-cryptoAndrew Waterman7-46/+11
2021-07-28scalar-crypto: Remove remaining RV*_ONLY codeBen Marshall2-17/+3
2021-07-28scalar-crypto: Remove DECLARE_RV*_ONLY macros from encoding.hBen Marshall1-21/+0
[...]
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