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| author | Benoît Monin <benoit.monin@bootlin.com> | 2026-02-23 16:54:47 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2026-02-25 18:49:03 +0530 |
| commit | bc2722b0f39a82113e32d336b6cddd60a8f6a85e (patch) | |
| tree | b3e3e2d2eddfc7d2f3db24404ebd5d7a81cf1e8f /platform/generic/include | |
| parent | c69c159bd033f5b539c810f12fa9a6e523a05709 (diff) | |
| download | opensbi-bc2722b0f39a82113e32d336b6cddd60a8f6a85e.tar.gz opensbi-bc2722b0f39a82113e32d336b6cddd60a8f6a85e.tar.bz2 opensbi-bc2722b0f39a82113e32d336b6cddd60a8f6a85e.zip | |
platform: generic: mips p8700: Add match data for CM info
Introduce a structure p8700_cm_info holding the number of coherence
managers and their base addresses found in a particular SoC.
Declare a global pointer to the structure that is set in
mips_p8700_platform_init(), based on the match data of the platform
compatible.
For the match data of the MIPS P8700, a single coherence manager with
a base address of 0x16100000 is declared, identical to what is found
in mips/board.h.
For now, access to the coherence manager register is still based on
the hard-coded values defined in mips/board.h.
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260223-for-upstream-eyeq7h-v3-8-621d004d1a21@mobileye.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'platform/generic/include')
| -rw-r--r-- | platform/generic/include/mips/p8700.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/platform/generic/include/mips/p8700.h b/platform/generic/include/mips/p8700.h index 6644e91d..8281e5e6 100644 --- a/platform/generic/include/mips/p8700.h +++ b/platform/generic/include/mips/p8700.h @@ -10,6 +10,18 @@ #include <mips/board.h> +/** Coherence manager information + * + * @num_cm: Number of coherence manager + * @gcr_base: Array of base address of the CM + */ +struct p8700_cm_info { + unsigned int num_cm; + unsigned long *gcr_base; +}; + +extern const struct p8700_cm_info *p8700_cm_info; + /* PMA */ #define CSR_MIPSPMACFG0 0x7e0 #define CSR_MIPSPMACFG1 0x7e1 |