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| author | Radim Krčmář <rkrcmar@ventanamicro.com> | 2025-04-29 16:25:43 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2025-04-30 10:14:25 +0530 |
| commit | f82c4bdf8cdd41ab35a9309105fad25f9ccb690f (patch) | |
| tree | ab258a1e2ac93455043d778319b3636b9e2cbedb /lib/utils/cppc | |
| parent | 99aabc6b8431a2bcf2b28a2423952e529de9fbc5 (diff) | |
| download | opensbi-f82c4bdf8cdd41ab35a9309105fad25f9ccb690f.zip opensbi-f82c4bdf8cdd41ab35a9309105fad25f9ccb690f.tar.gz opensbi-f82c4bdf8cdd41ab35a9309105fad25f9ccb690f.tar.bz2 | |
lib: sbi: add 64 bit csr macros
Most CSRs are XLEN bits wide, but some are 64 bit, so rv32 needs two
accesses, plaguing the code with ifdefs.
Add new helpers that split 64 bit operation into two operations on rv32.
The helpers don't use "csr + 0x10", but append "H" at the end of the csr
name to get a compile-time error when accessing a non 64 bit register.
This has the downside that you have to use the name when accessing them.
e.g. csr_read64(0x1234) or csr_read64(CSR_SATP) won't compile and the
error messages you get for these bugs are not straightforward.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250429142549.3673976-3-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/cppc')
0 files changed, 0 insertions, 0 deletions