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| author | Clément Léger <cleger@rivosinc.com> | 2024-11-25 11:53:00 +0100 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-12-15 11:53:53 +0530 |
| commit | b47fcd01b3ba0e3ea89f5454456eded04afb93ab (patch) | |
| tree | 562d80b17735cb4c34e2f5d3dcb8122b84e72422 /lib/utils/cppc | |
| parent | 851e3010989254e67bf809aa5fc9e90dd7baa487 (diff) | |
| download | opensbi-b47fcd01b3ba0e3ea89f5454456eded04afb93ab.zip opensbi-b47fcd01b3ba0e3ea89f5454456eded04afb93ab.tar.gz opensbi-b47fcd01b3ba0e3ea89f5454456eded04afb93ab.tar.bz2 | |
lib: sbi: sse: Fix a6 and a7 register content upon injection
The specification states that a6 contains the current hart id and
a7 contains the entry argument. This was inverted in the current
implementation.
Reported-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'lib/utils/cppc')
0 files changed, 0 insertions, 0 deletions