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authorClément Léger <cleger@rivosinc.com>2024-11-25 11:53:00 +0100
committerAnup Patel <anup@brainfault.org>2024-12-15 11:53:53 +0530
commitb47fcd01b3ba0e3ea89f5454456eded04afb93ab (patch)
tree562d80b17735cb4c34e2f5d3dcb8122b84e72422
parent851e3010989254e67bf809aa5fc9e90dd7baa487 (diff)
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lib: sbi: sse: Fix a6 and a7 register content upon injection
The specification states that a6 contains the current hart id and a7 contains the entry argument. This was inverted in the current implementation. Reported-by: Andrew Jones <andrew.jones@linux.dev> Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
-rw-r--r--lib/sbi/sbi_sse.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/sbi/sbi_sse.c b/lib/sbi/sbi_sse.c
index bf5620e..c9f9a9d 100644
--- a/lib/sbi/sbi_sse.c
+++ b/lib/sbi/sbi_sse.c
@@ -509,8 +509,8 @@ static void sse_event_inject(struct sbi_sse_event *e,
csr_write(CSR_SEPC, regs->mepc);
/* Setup entry context */
- regs->a6 = e->attrs.entry.arg;
- regs->a7 = current_hartid();
+ regs->a6 = current_hartid();
+ regs->a7 = e->attrs.entry.arg;
regs->mepc = e->attrs.entry.pc;
/* Return to S-mode with virtualization disabled */