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AgeCommit message (Expand)AuthorFilesLines
2017-06-08Reset to "success" instead of "error."dtm_reset_errorTim Newsome1-1/+1
2017-06-07Forbid S-mode execution from user memoryAndrew Waterman1-2/+2
2017-05-25minNum -> minimumNumberAndrew Waterman4-8/+16
2017-05-17Merge remote-tracking branch 'origin/priv-1.10'Palmer Dabbelt91-2992/+3566
2017-05-16Merge remote-tracking branch 'origin/debug-0.13' into priv-1.10Palmer Dabbelt17-2528/+2696
2017-05-15Better error message when doing DMI operations and we're busyPalmer Dabbelt1-2/+10
2017-05-15debug: whitespace errorsMegan Wachs1-2/+2
2017-05-15Merge branch 'debug-0.13' into HEADMegan Wachs1-0/+6
2017-05-13Make C.LI/C.LUI trapping behavior match specAndrew Waterman2-2/+1
2017-05-05UXL=SXL=MXLAndrew Waterman2-4/+18
2017-05-05Trap superpage PTEs when PPN LSBs are setAndrew Waterman1-0/+2
2017-05-03Add missing include for devices.hKito Cheng1-0/+2
2017-05-01Fix segfault when accessing bad memory addressesAndrew Waterman3-11/+8
2017-05-01Set default entry point from ELFAndrew Waterman2-4/+8
2017-04-30Add option to set start pcAndrew Waterman2-9/+20
2017-04-30Support more flexible main memory allocationAndrew Waterman4-31/+59
2017-04-30Store both host & target address in soft TLBAndrew Waterman3-38/+47
2017-04-26Remove a debugging printfPalmer Dabbelt1-1/+0
2017-04-26Don't spin on the remote bitbang readsPalmer Dabbelt1-1/+1
2017-04-26Handle abstractcs.busyPalmer Dabbelt1-8/+10
2017-04-26Have ndmreset reset the processorPalmer Dabbelt1-0/+3
2017-04-25FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.XAndrew Waterman4-8/+8
2017-04-25Remove hret instructionAndrew Waterman1-3/+0
2017-04-19Fix builds with "--enable-commitlog"Palmer Dabbelt1-1/+1
2017-04-18debug: move remote_bitbang into riscvMegan Wachs2-0/+214
2017-04-18debug: Remove duplicate remote_bitbang fileMegan Wachs2-208/+0
2017-04-18debug: Able to successfully examine a single hart.Megan Wachs1-1/+3
2017-04-18debug: Use Debug-Module specific constants instead of global defines.Megan Wachs3-45/+48
2017-04-18debug: Checkpoint which somewhat works with OpenOCD v13, but still has some b...Megan Wachs6-95/+107
2017-04-17debug: Move things around, but addresses now conflict with ROM.Megan Wachs5-119/+93
2017-04-17debug: consider COMMAND.transfer bit, and implment HARTINFOMegan Wachs1-9/+20
2017-04-17debug: Compiles again with new debug_defines.h file, but not tested.Megan Wachs2-12/+4
2017-04-17debug: bump the debug_defines to match specMegan Wachs1-149/+61
2017-04-17Merge remote-tracking branch 'origin/priv-1.10' into HEADMegan Wachs79-332/+747
2017-04-10Implement new FP encodingAndrew Waterman57-70/+93
2017-04-07Implement vectored interrupt proposalAndrew Waterman1-3/+5
2017-04-05Add --enable-misaligned option for misaligned ld/st supportAndrew Waterman2-4/+31
2017-03-31update encoding.h to get PMP updatesYunsup Lee1-5/+6
2017-03-30fdt: move interrupt controller into its own nodeWesley W. Terpstra1-4/+7
2017-03-27Set badaddr=0 on illegal instruction trapsAndrew Waterman4-7/+7
2017-03-27On EBREAK, set badaddr to pcAndrew Waterman3-3/+3
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman4-13/+25
2017-03-24Default to 2 GiB of memoryAndrew Waterman1-1/+1
2017-03-23Require little-endian hostAndrew Waterman2-0/+14
2017-03-22riscv: replace rtc device with a real clint implementationWesley W. Terpstra8-55/+96
2017-03-21sim: declare cores as interrupt-controllers for clintWesley W. Terpstra1-0/+2
2017-03-21bootrom: set a0 to hartid and a1 to dtb before bootWesley W. Terpstra1-7/+7
2017-03-21configstring: rename variables to dtsWesley W. Terpstra2-7/+7
2017-03-21riscv: remove dependency on num_coresWesley W. Terpstra3-5/+1
2017-03-21bootrom: include compiled dtbWesley W. Terpstra1-1/+87
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