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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-10-25 19:41:39 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-10-25 19:41:39 -0700 |
| commit | 2c9a83235282c11b197278cd9c072e96c58b2429 (patch) | |
| tree | f240cf9dd2e30d8e753dc10458ec4587f3c9866e /riscv/decode.h | |
| parent | 8456c1e923dc515717c92a50b696d0c6d58e4d93 (diff) | |
| download | spike-2c9a83235282c11b197278cd9c072e96c58b2429.zip spike-2c9a83235282c11b197278cd9c072e96c58b2429.tar.gz spike-2c9a83235282c11b197278cd9c072e96c58b2429.tar.bz2 | |
[sim,xcc,pk,opcodes] static rounding modes for FP insns
Now, you can either use the RM in the FSR or specify it in the insn.
(Except for FP->int; no dynamic for that.)
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 810af3f..3db82da 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -175,6 +175,7 @@ private: #define TARGET insn.jtype.target #define BRANCH_TARGET (npc + (SIMM << BRANCH_ALIGN_BITS)) #define JUMP_TARGET ((npc & ~((1<<(TARGET_BITS+JUMP_ALIGN_BITS))-1)) + (TARGET << JUMP_ALIGN_BITS)) +#define RM ((insn.ftype.ffunct >> 1) & 3) #define require_supervisor if(!(sr & SR_S)) throw trap_privileged_instruction #define require64 if(gprlen != 64) throw trap_illegal_instruction |