aboutsummaryrefslogtreecommitdiff
path: root/hw
AgeCommit message (Expand)AuthorFilesLines
2019-10-22npu2-opencapi: Make sure the PCI slot has the proper IDFrederic Barrat1-1/+2
2019-10-22npu2-hw-procedures: Move some opencapi PHY settings in one-off initFrederic Barrat1-19/+16
2019-09-06hw/psi: Remove explicit external IRQ policyOliver O'Halloran1-8/+6
2019-09-06hw/psi-p9: Mask OPAL-owned LSIs without handlersOliver O'Halloran2-6/+36
2019-09-06hw/psi-p9: Make interrupt name array globalOliver O'Halloran1-19/+19
2019-09-06hw/psi: Add chip ID to interrupt namesOliver O'Halloran1-23/+33
2019-09-06xive: fix return value of opal_xive_allocate_irq()Cédric Le Goater1-1/+1
2019-09-06hw/test: include -gcov binaries in clean targetEric Richter1-1/+1
2019-09-06slw: Enable stop states on P9PRyan Grimm1-1/+2
2019-08-23hw/lpc: Configure SerIRQ interrupts on P9POliver O'Halloran1-2/+5
2019-08-23npu3: Delay enablement of DL parity checkingReza Arbab2-6/+8
2019-08-23pci: recheck pci nvram hacks on fast-rebootOliver O'Halloran1-2/+0
2019-08-23npu2: Invalidate entire TCE cache if many entries requestedAlexey Kardashevskiy1-5/+12
2019-08-16ipmi: Use standard MIN() macro definitionJordan Niethe1-3/+1
2019-08-16hw/phb4: Use standard MIN/MAX macro definitionsJordan Niethe1-6/+3
2019-08-16hw/phb4: Prevent register accesses when in resetOliver O'Halloran1-0/+10
2019-08-16npu: Fix device binding error messageReza Arbab1-2/+6
2019-08-16npu3: Expose remaining ATSD launch registersReza Arbab1-9/+12
2019-08-16npu3: Initialize NPU3_SNP_MISC_CFG0Reza Arbab1-0/+7
2019-08-16npu3: Rename NPU3_SM_MISC_CFGn register macrosReza Arbab1-5/+5
2019-08-16pci: Use a macro for accessing PCI BDF Function NumberJordan Niethe3-8/+8
2019-08-16pci: Use a macro for accessing PCI BDF Device NumberJordan Niethe2-4/+4
2019-08-16pci: Use a macro for accessing PCI BDF Bus NumberJordan Niethe4-11/+11
2019-08-16include/xscom: Use the name EQ rather than EPOliver O'Halloran1-6/+6
2019-08-15HIOMAP: Reset bmc mbox in MPIPL pathVasant Hegde1-0/+6
2019-08-15MPIPL: Save crashing PIRVasant Hegde1-0/+4
2019-08-15MPIPL: Add support to trigger MPIPL on BMC systemVasant Hegde2-3/+74
2019-08-15SBE: Send OPAL relocated base address to SBEVasant Hegde1-0/+48
2019-08-15hdata: Split MDST 'type' field to accommodate MPIPLVasant Hegde1-4/+4
2019-08-15FSP/MDST: Rename fsp-mdst-table.c -> fsp-sysdump.cVasant Hegde2-4/+4
2019-08-02occ: Add pstate corresponding to base frequency to DTShilpasri G Bhat1-0/+2
2019-08-02hw/sbe-p9: Fix multi-line log messagesOliver O'Halloran1-3/+3
2019-07-30Support BMC IPMI heartbeat commandAndrew Geissler1-0/+14
2019-07-30hw: Put SPDX on new filesOliver O'Halloran5-70/+15
2019-07-26hw: Introduce npu3Reza Arbab5-9/+3214
2019-07-26npu2: Add checks to npu2-only codepathsReza Arbab1-0/+4
2019-07-26npu2: Refactor NPU OPAL callsReza Arbab3-132/+183
2019-07-26npu2: Prepare purge_l2_l3_caches() for reuseReza Arbab3-139/+175
2019-07-26hw/phys-map: Add Axone memory mapReza Arbab2-3/+139
2019-07-26hw/phys-map: Add pvr argument to phys_map_init()Reza Arbab2-5/+13
2019-07-26Dedup $(HW_OBJS)Reza Arbab1-4/+2
2019-07-26SPDX-ify all skiboot codeStewart Smith83-1149/+321
2019-07-19Move ec/ code to Rhesus platformStewart Smith4-104/+0
2019-07-19sparse: lpc uart interrupt pointer endiannessStewart Smith1-1/+1
2019-06-27npu2: Increase timeout for L2/L3 cache purgingAlexey Kardashevskiy1-7/+13
2019-06-27hw/phb3: Add verbose EEH outputOliver O'Halloran1-1/+96
2019-06-27pci: Make the pci-eeh-verbose nvram option genericOliver O'Halloran1-7/+3
2019-06-27external/mambo: Bump default POWER9 to Nimbus DD2.3Nicholas Piggin1-1/+1
2019-06-24Experimental support for building without FSP codeStewart Smith1-0/+3
2019-06-24Move platform specific PRD functionality to struct platformStewart Smith1-11/+25
generated by cgit v1.1 at 2024-07-19 10:30:57 +0000