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2021-08-06occ: Add POWER10 supportVaidyanathan Srinivasan1-11/+161
Add support for parsing OCC on Power10 to populate the pstate information. Also enables OCC on P10 Denali system. Co-authored-by: Pratik R. Sampat <psampat@linux.ibm.com> Co-authored-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com> Signed-off-by: Pratik R. Sampat <psampat@linux.ibm.com> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2021-07-19powercap: occ: Set occ_set_powercap as const attributePratik R. Sampat1-1/+1
The commit fixes the compile time warning suggestion of setting occ_set_powercap as a candiate for the attribute 'const'. Fixes: c6aabe3f2eb5 (powercap: occ: Add a generic powercap framework) Signed-off-by: Pratik R. Sampat <psampat@linux.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-06-03occ: Fix false negatives in wait_for_all_occ_init()Gautham R. Shenoy1-30/+147
Currently the wait_for_all_occ_init() function determines that the OCCs associated with every Chip has been initialized by verifying if the "Valid" bit in pstate table of that OCC is set. However, on chips where all the EX units are guarded, the OCC, even though it is active, does not update the pstate_table. Currently as a result of this, OPAL concludes that the OCC is not functional and not only disable Pstate initialization, but incorrectly report that that OCCs were not initialized, thereby cutting other features such as sensors. Fix this by ensuring that * We check if there is atleast one active EX unit in the chip before checking if the OCC is active. * On platforms with OCC-OPAL communication interface version 0x90 * wait_for_all_occ_init() only checks if the occ_state in the OCC dynamic area is set to "Active State". * move the "Valid" bit check to add_cpu_pstate_properties(), which is where we create the device-tree entries for frequency scaling. Cc: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Tested-by: Pavaman Subramaniyam <pavsubra@in.ibm.com> Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2020-03-12Re-license IBM written files as Apache 2.0 OR GPLv2+Stewart Smith1-1/+1
SPDX makes it a simpler diff. I have audited the commit history of each file to ensure that they are exclusively authored by IBM and thus we have the right to relicense. The motivation behind this is twofold: 1) We want to enable experiments with coreboot, which is GPLv2 licensed 2) An upcoming firmware component wants to incorporate code from skiboot and code from the Linux kernel, which is GPLv2 licensed. I have gone through the IBM internal way of gaining approval for this. The following files are not exclusively authored by IBM, so are *not* included in this update (I will be seeking approval from contributors): core/direct-controls.c core/flash.c core/pcie-slot.c external/common/arch_flash_unknown.c external/common/rules.mk external/gard/Makefile external/gard/rules.mk external/opal-prd/Makefile external/pflash/Makefile external/xscom-utils/Makefile hdata/vpd.c hw/dts.c hw/ipmi/ipmi-watchdog.c hw/phb4.c include/cpu.h include/phb4.h include/platform.h libflash/libffs.c libstb/mbedtls/sha512.c libstb/mbedtls/sha512.h platforms/astbmc/barreleye.c platforms/astbmc/garrison.c platforms/astbmc/mihawk.c platforms/astbmc/nicole.c platforms/astbmc/p8dnu.c platforms/astbmc/p8dtu.c platforms/astbmc/p9dsu.c platforms/astbmc/vesnin.c platforms/rhesus/ec/config.h platforms/rhesus/ec/gpio.h platforms/rhesus/gpio.c platforms/rhesus/rhesus.c platforms/astbmc/talos.c platforms/astbmc/romulus.c Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: fixed up the drift] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-12-16occ sensors: make endian-cleanNicholas Piggin1-23/+23
Convert occ sensors dt construction and in-memory hardware tables to use explicit endian conversions. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-12-16opal-msg: endian fixes for opal-msg.c and opal_queue_msg callersNicholas Piggin1-2/+4
Reported-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-11-11Remove dead POWER7 codeNicholas Piggin1-6/+2
There are a number of proc_gen branches removed that are trivially dead code and comments that refer to P7. As well as those: - Oliver points out that add_xics_icps() must be unused on POWER8 because it asserts if number of threads > 4, so remove it. - Change 16b7ae641 ("Remove POWER7 and POWER7+ support") removed all references to opal_boot_trampoline, so remove that. - It also removed the only non-trival choose_bus implementation, so that is removed and its caller simplified. - Remove the paca code, later CPUs use pcia. Cc: Stewart Smith <stewart@flamingspork.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-02occ: Add pstate corresponding to base frequency to DTShilpasri G Bhat1-0/+2
Unlike POWER8, nominal frequency is not the highest guaranteed frequency of the POWER9 chip. In POWER9, the highest guaranteed frequency is greater than the nominal frequency and is referred to as base frequency. In POWER9 base frequency is the highest frequency the processor will operate at when ALL cores are active and in ANY operating condition. This patch exports the turbo pstate as the base frequency as per OCC documentation. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> [oliver: delete ibm,pstate-base on fast reboot] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith1-13/+5
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-06-24Move core/hostservices.c to platforms/ibm-fsp/Stewart Smith1-1/+0
It's only used on FSP systems so should really just be part of that platform support. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-24Split FSP OCC code out into hw/fsp/Stewart Smith1-387/+1
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-03opal-msg: Pass parameter size to _opal_queue_msg()Vasant Hegde1-7/+9
Currently _opal_queue_msg() takes number of parameters. So far this was fine as opal_queue_msg() was supporting only fixed number of parameters (8 * 8 bytes). Soon we are going to introduce variable size parameter. Hence num_params -> params_size. Cc: Jeremy Kerr <jk@ozlabs.org> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-03opal-msg: Pass return value to callback handlerVasant Hegde1-2/+2
Kernel calls opal_get_msg() API to read OPAL message. In this path OPAL calls "callback" handler to inform caller that kernel read the opal message. It assumes that read is always success. This assumption was fine as message was always fixed size. Next patch introduces variable size opal message. In that situation opal_get_msg() may fail due to insufficient buffer size (ex: old kernel and new OPAL combination). So lets add `return value` parameter to "callback" handler. So that caller knows kernel didn't read the message and take appropriate action. Cc: Jeremy Kerr <jk@ozlabs.org> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-20occ-sensors: Check if OCC is reset while reading inband sensorsShilpasri G Bhat1-0/+5
OCC may not be able to mark the sensor buffer as invalid while going down RESET. If OCC never comes back we will continue to read the stale sensor data. So verify if OCC is reset while reading the sensor values and propagate the appropriate error. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-15xscom: move more register definitions into processor-specific includesNicholas Piggin1-0/+1
Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-15fast-reboot: occ: Remove 'freq-domain-mask' from fast-reboot pathShilpasri G Bhat1-43/+42
OCC can change the pstate table at runtime to modify pstate limits or for characterization purpose. These changes are reflected by re-parsing the pstate table during fast-reboot to update the device-tree. Only relevant pstate DT properties are deleted and newly added during fast-reboot. The device-tree properties like 'freq-domain-mask' and 'domain-runs-at' are currently hard-coded and need not be updated during fast-reboot. So this patch removes them from the fast-reboot path. This patch fixes the below crash: [ 270.313998453,5] OCC: All Chip Rdy after 0 ms [ 270.314148918,3] Duplicate property "freq-domain-mask" in node /ibm,opal/power-mgt [ 270.314208553,0] Aborting! CPU 083c Backtrace: S: 0000000035de3a20 R: 000000003001b480 ._abort+0x4c S: 0000000035de3aa0 R: 0000000030028704 .new_property+0xd8 S: 0000000035de3b30 R: 0000000030028964 .__dt_add_property_cells+0x30 S: 0000000035de3bd0 R: 0000000030042980 .occ_pstates_init+0x7c8 S: 0000000035de3d90 R: 00000000300145f4 .load_and_boot_kernel+0x980 S: 0000000035de3e70 R: 00000000300276b4 .fast_reboot_entry+0x37c S: 0000000035de3f00 R: 0000000030002ac4 reset_fast_reboot_wakeup+0x40 Fixes: b821f8c2a8e3("power-mgmt : occ : Add 'freq-domain-mask' DT property") Reported-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Tested-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-25power-mgmt : occ : Add 'freq-domain-mask' DT propertyAbhishek Goel1-0/+24
Add a new device-tree property freq-domain-indicator to define group of CPUs which would share same frequency. This property has been added under power-mgmt node. It is a bitmask. Bitwise AND is taken between this bitmask value and PIR of cpu. All the CPUs lying in the same frequency domain will have same result for AND. For example, For POWER9, 0xFFF0 indicates quad wide frequency domain. Taking AND with the PIR of CPUs will yield us frequency domain which is quad wise distribution as last 4 bits have been masked which represent the cores. Similarly, 0xFFF8 will represent core wide frequency domain for P8. Also, Add a new device-tree property domain-runs-at which will denote the strategy OCC is using to change the frequency of a frequency-domain. There can be two strategy - FREQ_MOST_RECENTLY_SET and FREQ_MAX_IN_DOMAIN. FREQ_MOST_RECENTLY_SET : the OCC sets the frequency of the quad to the most recent frequency value requested by the CPUs in the quad. FREQ_MAX_IN_DOMAIN : the OCC sets the frequency of the CPUs in the Quad to the maximum of the latest frequency requested by each of the component cores. Signed-off-by: Abhishek Goel <huntbag@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-25powercap: occ: Fix the powercapping range allowed for userShilpasri G Bhat1-8/+22
OCC provides two limits for minimum powercap. One being hard powercap minimum which is guaranteed by OCC and the other one is a soft powercap minimum which is lesser than hard-min and may or may not be asserted due to various power-thermal reasons. So to allow the users to access the entire powercap range, this patch exports soft powercap minimum as the "powercap-min" DT property. And it also adds a new DT property called "powercap-hard-min" to export the hard-min powercap limit. Fixes: c6aabe3f2eb5("powercap: occ: Add a generic powercap framework") Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-09-17occ: Wait if OCC GPU presence status not immediately availableAndrew Donnellan1-3/+13
It takes a few seconds for the OCC to set everything up in order to read GPU presence. At present, we try to kick off OCC initialisation as early as possible to maximise the time it has to read GPU presence. Unfortunately sometimes that's not enough, so add a loop in occ_get_gpu_presence() so that on the first time we try to get GPU presence we keep trying for up to 2 seconds. Experimentally this seems to be adequate. Fixes: 9b394a32c8ea ("occ: Add support for GPU presence detection") Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-04occ: sensors: Fix the size of the phandle array 'sensors' in DTShilpasri G Bhat1-2/+2
Fixes: 99505c03f493 ("sensor-groups: occ: Add support to disable/enable sensor group") Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-03occ: Update Dynamic Data comment block with new GPU presence fieldsAndrew Donnellan1-0/+5
Document new GPU presence fields in the comment block next to struct occ_dynamic_data. Fixes: 9b394a32c8ea ("occ: Add support for GPU presence detection") Suggested-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27occ: Add support for GPU presence detectionAndrew Donnellan1-3/+20
On the Witherspoon platform, we need to distinguish between NVLink GPUs and OpenCAPI accelerators. In order to do this, we first need to find out whether the SXM2 socket is populated. On Witherspoon, the SXM2 socket's presence detection pin is only visible via I2C from the APSS, and thus can only be exposed to the host via the OCC. The OCC, per OCC Firmware Interface Specification for POWER9 version 0.22, now exposes this to skiboot through a field in the dynamic data shared memory. Add the necessary dynamic data changes required to read the version and GPU presence fields. Add a function, occ_get_gpu_presence(), that can be used to check GPU presence. If the OCC isn't reporting presence (old OCC firmware, or some other reason), we default to assuming there is a device present and wait until link training to fail. This will be used in later patches to fix up the NPU2 probe path for OpenCAPI support on Witherspoon. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-27occ: Move occ declarations into occ.hAndrew Donnellan1-1/+1
OCC declarations are currently split between skiboot.h and occ-sensor.h. Given the growing unwieldyness of skiboot.h it's probably time to move it all into one header. Rename occ-sensor.h to occ.h, move all OCC-related declarations out of skiboot.h, and add #includes as necessary. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-05-06occ: Use major version number while checking the pstate table formatShilpasri G Bhat1-24/+23
The minor version increments of the pstate table are backward compatible. The minor version is changed when the pstate table remains same and the existing reserved bytes are used for pointing new data. So use only major version number while parsing the pstate table. This will allow old skiboot to parse the pstate table and handle minor version updates. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-04-11occ: sensors-groups: Add DT properties to mark HWMON sensor groupsShilpasri G Bhat1-3/+14
Fix the sensor type to match HWMON sensor types. Add compatible flag to indicate the environmental sensor groups so that operations on these groups can be handled by HWMON linux interface. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-03-27fast-reboot: occ: Only delete /ibm, opal/power-mgt nodes if they existCyril Bur1-5/+7
Fixes: ac4272bf ("fast-reboot: occ: Delete OCC child nodes in /ibm, opal/power-mgt") Fixes: CID 263053 Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2018-03-27occ: Set up OCC messaging even if we fail to setup pstatesStewart Smith1-8/+21
This means that we no longer hit this bug if we fail to get valid pstates from the OCC. [console-pexpect]#echo 1 > //sys/firmware/opal/sensor_groups//occ-csm0/clear echo 1 > //sys/firmware/opal/sensor_groups//occ-csm0/clear [ 94.019971181,5] CPU ATTEMPT TO RE-ENTER FIRMWARE! PIR=083d cpu @0x33cf4000 -> pir=083d token=8 [ 94.020098392,5] CPU ATTEMPT TO RE-ENTER FIRMWARE! PIR=083d cpu @0x33cf4000 -> pir=083d token=8 [ 10.318805] Disabling lock debugging due to kernel taint [ 10.318808] Severe Machine check interrupt [Not recovered] [ 10.318812] NIP [000000003003e434]: 0x3003e434 [ 10.318813] Initiator: CPU [ 10.318815] Error type: Real address [Load/Store (foreign)] [ 10.318817] opal: Hardware platform error: Unrecoverable Machine Check exception [ 10.318821] CPU: 117 PID: 2745 Comm: sh Tainted: G M 4.15.9-openpower1 #3 [ 10.318823] NIP: 000000003003e434 LR: 000000003003025c CTR: 0000000030030240 [ 10.318825] REGS: c00000003fa7bd80 TRAP: 0200 Tainted: G M (4.15.9-openpower1) [ 10.318826] MSR: 9000000000201002 <SF,HV,ME,RI> CR: 48002888 XER: 20040000 [ 10.318831] CFAR: 0000000030030258 DAR: 394a00147d5a03a6 DSISR: 00000008 SOFTE: 1 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> [Additional changes from Shilpa] Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Tested-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2018-02-28fast-reboot: occ: Delete OCC child nodes in /ibm, opal/power-mgtShilpasri G Bhat1-1/+5
Fast-reboot in P8 fails to re-init OCC data as there are chipwise OCC nodes which are already present in the /ibm,opal/power-mgt node. These per-chip nodes hold the voltage IDs for each pstate and these can be changed on OCC pstate table biasing. So delete these before calling the re-init code to re-parse and populate the pstate data. Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2018-02-21sensor-groups: occ: Add support to disable/enable sensor groupShilpasri G Bhat1-15/+122
This patch adds a new opal call to enable/disable a sensor group. This call is used to select the sensor groups that needs to be copied to main memory by OCC at runtime. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> [stewart: rebase and bump OPAL API number] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2018-02-13hw/occ: Fix fast-reboot crash in P8 platforms.Pridhiviraj Paidipeddi1-0/+2
commit 85a1de35cbe4 ("fast-boot: occ: Re-parse the pstate table during fast-boot" ) breaks the fast-reboot on P8 platforms while reiniting the OCC pstates. On P8 platforms OPAL adds additional two properties #address-cells and #size-cells under ibm,opal/power-mgmt/ DT node. While in fast-reboot same properties adding back to the same node results in Duplicate properties and hence fast-reboot fails with below traces. [ 541.410373292,5] OCC: All Chip Rdy after 0 ms [ 541.410488745,3] Duplicate property "#address-cells" in node /ibm,opal/power-mgt [ 541.410694290,0] Aborting! CPU 0058 Backtrace: S: 0000000031d639d0 R: 000000003001367c .backtrace+0x48 S: 0000000031d63a60 R: 000000003001a03c ._abort+0x4c S: 0000000031d63ae0 R: 00000000300267d8 .new_property+0xd8 S: 0000000031d63b70 R: 0000000030026a28 .__dt_add_property_cells+0x30 S: 0000000031d63c10 R: 000000003003ea3c .occ_pstates_init+0x984 S: 0000000031d63d90 R: 00000000300142d8 .load_and_boot_kernel+0x86c S: 0000000031d63e70 R: 000000003002586c .fast_reboot_entry+0x358 S: 0000000031d63f00 R: 00000000300029f4 fast_reset_entry+0x2c This patch fixes this issue by removing these two properties on P8 while doing OCC pstates re-init in fast-reboot code path. Fixes: 85a1de35cbe4 Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2018-02-08fast-boot: occ: Re-parse the pstate table during fast-bootShilpasri G Bhat1-2/+21
OCC shares the frequency list to host by copying the pstate table to main memory in HOMER. This table is parsed during boot to create device-tree properties for frequency and pstate IDs. OCC can update the pstate table to present a new set of frequencies to the host. But host will remain oblivious to these changes unless it is re-inited with the updated device-tree CPU frequency properties. So this patch allows to re-parse the pstate table and update the device-tree properties during fast-reboot. OCC updates the pstate table when asked to do so using pstate-table bias command. And this is mainly used by WOF team for characterization purposes. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Tested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-14opal-prd: occ: Add support for runtime OCC load/start in ZZShilpasri G Bhat1-10/+52
This patch adds support to handle OCC load/start event from FSP/PRD. During IPL we send a success directly to FSP without invoking any HBRT load routines on recieving OCC load mbox message from FSP. At runtime we forward this event to host opal-prd. This patch provides support for invoking OCC load/start HBRT routines like load_pm_complex() and start_pm_complex() from opal-prd. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-14opal-prd: Add support for runtime OCC reset in ZZShilpasri G Bhat1-1/+50
This patch handles OCC_RESET runtime events in host opal-prd and also provides support for calling 'hostinterface->wakeup()' which is required for doing the reset operation. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-01hw/occ: Log proper SCOM register namesPridhiviraj Paidipeddi1-3/+3
This patch fixes the logging of incorrect SCOM register names. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-11-30sensors: Fix dtc warning for new occ inband sensors.Pridhiviraj Paidipeddi1-0/+1
dtc complains about missing reg property when a DT node is having a unit name or address but no reg property. /ibm,opal/sensors/vrm-in@c00004 has a unit name, but no reg property /ibm,opal/sensors/gpu-in@c0001f has a unit name, but no reg property /ibm,opal/sensor-groups/occ-js@1c00040 has a unit name, but no reg property This patch fixes these warnings for new occ inband sensors and also for sensor-groups by adding necessary properties. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-11-30hw/occ: Fix psr cpu-to-gpu sensors node dtc warning.Pridhiviraj Paidipeddi1-0/+3
dtc complains about missing reg property when a DT node is having a unit name or address but no reg property. /ibm,opal/power-mgt/psr/cpu-to-gpu@0 has a unit name, but no reg property /ibm,opal/power-mgt/psr/cpu-to-gpu@100 has a unit name, but no reg property This patch fixes this by adding necessary properties. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-11-20OCC: Increase max pstate check on P9 to 255Stewart Smith1-4/+6
This has changed from P8, we can now have > 127 pstates. This was observed on Boston during WoF bringup. Reported-by: Minda Wei <minda.wei@ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Reported-by: Francesco A Campisano <campisan@us.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-08-11sensor-groups : occ: Add 'ops' DT propertyShilpasri G Bhat1-0/+1
Add new device-tree property 'ops' to define different operations supported on each sensor-group. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-28sensors: occ: Add support to clear sensor groupsShilpasri G Bhat1-0/+77
Adds a generic API to clear sensor groups. OCC inband sensor groups such as CSM, Profiler and Job Scheduler can be cleared using this API. It will clear the min/max of all sensors belonging to OCC sensor groups. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-28psr: occ: Add support to change power-shifting-ratioShilpasri G Bhat1-0/+95
Add support to set the CPU-GPU power shifting ratio which is used by the OCC power capping algorithm. PSR value of 100 takes all power away from CPU first and a PSR value of 0 caps GPU first. Documentation enhanced by Stewart Smith. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-28powercap: occ: Add a generic powercap frameworkShilpasri G Bhat1-2/+117
This patch adds a generic powercap framework and exports OCC powercap sensors using which system powercap can be set inband through OPAL-OCC command-response interface. Documentation for powercap enhanced by Stewart Smith. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-28occ: Add support for OPAL-OCC command/response interfaceShilpasri G Bhat1-4/+415
This patch adds support for a shared memory based command/response interface between OCC and OPAL. In HOMER, there is an OPAL command buffer and an OCC response buffer which is used to send inband commands to OCC. The OPAL-OCC command/response sequence is as follows: 1. Check if both 'OCC Progress' bit in OCC response flag and 'Cmd Ready' bit in OPAL command flag are set to zero. If yes then proceed with below steps to send a command to OCC. 2. Write the command value, request ID and command specific data to the OPAL command buffer. 3. Clear the response flag and set the 'Cmd Ready' bit in OPAL command flag to indicate command is ready. 4. OCC will poll the command flag every 4ms to check if 'Cmd Ready' bit is set by OPAL. If the bit is set then OCC will set the 'OCC Progress' bit. 5. OCC will process the command and write the response to the OCC response buffer and set the 'Rsp Ready' bit in the response flag and sends an interrupt. 8. OPAL will receive the interrupt and queue the response to the host. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-04hw/occ: remove dead codeStewart Smith1-5/+2
ulta_turbo_supported will always be true in this codepath, so the condition isn't needed found by static analysis Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-07-04hw/occ: explicitly document fallthroughStewart Smith1-0/+1
Found by static analysis Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-15occ: Set return variable to correct valueCyril Bur1-0/+1
When entering this section of code rc will be zero. If fsp_mkmsg() fails the code responsible for printing an error message won't be set. Resetting rc should allow for the error case to trigger if fsp_mkmsg fails. Fixes: 3c64f79ad2220d03a0af49d44f0548e08da54a44 Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> [stewart@linux.vnet.ibm.com: add Fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-08platform/zz: Acknowledge OCC_LOAD mbox message in ZZShilpasri G Bhat1-2/+15
In P9 FSP box, OCC image is pre-loaded. So do not handle the load command and send SUCCESS to FSP on recieving OCC_LOAD mbox message. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-06-06p8-i2c: occ: Add support for OCC to use I2C enginesShilpasri G Bhat1-0/+4
This patch adds support to share the I2C engines with host and OCC. OCC uses I2C engines to read DIMM temperatures and to communicate with GPU. OCC Flag register is used for locking between host and OCC. Host requests for the bus by setting a bit in OCC Flag register. OCC sends an interrupt to indicate the change in ownership. Originally-from: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: Pretty heavily rework logic, including fixing bus owner change and separating out occ lock from sensor cache] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-05-31occ: Skip setting cores to nominal frequency in P9Shilpasri G Bhat1-5/+8
In P9, once OCC is up, it is supposed to setup the cores to nominal frequency. So skip this step in OPAL. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-05-31occ: Fix Pstate ordering for P9Shilpasri G Bhat1-168/+504
In P9 the pstate values are positive. They are continuous set of unsigned integers [0 to +N] where Pmax is 0 and Pmin is N. The linear ordering of pstates for P9 has changed compared to P8. P8 has neagtive pstate values advertised as [0 to -N] where Pmax is 0 and Pmin is -N. This patch adds helper routines to abstract pstate comparison with pmax and adds sanity pstate limit checks. This patch also fixes pstate arithmetic by using labs(). Suggested-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-04-12occ/irq: Fix SCOM address and irq reasons for P9 OCCShilpasri G Bhat1-13/+72
This patch fixes the SCOM address for OCC_MISC register which is used for OCC interupts. In P9, OCC sends an interrupt to notify change in the shared memory like throttle status. This patch handles this interrupt reason. Originally-from: Michael Neuling <mikey@neuling.org> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org>
generated by cgit v1.1 at 2024-10-12 09:40:10 +0000