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For each NX instance, VAS RMA write BAR register should be set with
the corresponding VAS RMA BAR value.
Refer section: 5.30 VAS RMA write BAR (P10 NX work Book V1.01)
Signed-off-by: Haren Myneni <haren@linux.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
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SPDX makes it a simpler diff.
I have audited the commit history of each file to ensure that they are
exclusively authored by IBM and thus we have the right to relicense.
The motivation behind this is twofold:
1) We want to enable experiments with coreboot, which is GPLv2 licensed
2) An upcoming firmware component wants to incorporate code from skiboot
and code from the Linux kernel, which is GPLv2 licensed.
I have gone through the IBM internal way of gaining approval for this.
The following files are not exclusively authored by IBM, so are *not*
included in this update (I will be seeking approval from contributors):
core/direct-controls.c
core/flash.c
core/pcie-slot.c
external/common/arch_flash_unknown.c
external/common/rules.mk
external/gard/Makefile
external/gard/rules.mk
external/opal-prd/Makefile
external/pflash/Makefile
external/xscom-utils/Makefile
hdata/vpd.c
hw/dts.c
hw/ipmi/ipmi-watchdog.c
hw/phb4.c
include/cpu.h
include/phb4.h
include/platform.h
libflash/libffs.c
libstb/mbedtls/sha512.c
libstb/mbedtls/sha512.h
platforms/astbmc/barreleye.c
platforms/astbmc/garrison.c
platforms/astbmc/mihawk.c
platforms/astbmc/nicole.c
platforms/astbmc/p8dnu.c
platforms/astbmc/p8dtu.c
platforms/astbmc/p9dsu.c
platforms/astbmc/vesnin.c
platforms/rhesus/ec/config.h
platforms/rhesus/ec/gpio.h
platforms/rhesus/gpio.c
platforms/rhesus/rhesus.c
platforms/astbmc/talos.c
platforms/astbmc/romulus.c
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
[oliver: fixed up the drift]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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Use Software Package Data Exchange (SPDX) to indicate license for each
file that is unique to skiboot.
At the same time, ensure the (C) who and years are correct.
See https://spdx.org/
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
[oliver: Added a few missing files]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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The read offset (4:11) in Receive FIFO control register is incremented
by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
match with the corresponding entry in FIFO maintained by VAS in kernel.
VAS entry is reset to 0 when opening the receive window during driver
initialization. So when NX842 is reloaded or in kexec boot, possibility
of mismatch between RxFIFO control register and VAS entries in kernel.
It could cause CRB failure / timeout from NX.
This patch adds nx_coproc_init opal call for kernel to initialize
readOffset (4:11) and Queued (15:23) in RxFIFO control register.
Fixes: 3b3c5962f432 ("NX: Add P9 NX support for 842 compression engine")
CC: stable # v5.8+
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We print out a whole bunch of things on boot, most of which aren't
interesting, so we should *not* print them instead.
Printing things like what CPUs we found and what PCI devices we found
*are* useful, so continue to do that. But we don't need to splat out
a bunch of things that are always going to be true.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Power 9 introduces NX gzip compression engine. This patch adds gzip
compression support in NX. Virtual Accelerator Switch (VAS) is used to
access NX gzip engine and the channel configuration will be done with
the receive FIFO. So RxFIFO address, logical partition ID (lpid),
process ID (pid) and thread ID (tid) are used to configure RxFIFO.
P9 NX supports high and normal priority FIFOS. Skiboot configures User
Mode Access Control (UMAC) noitify match register with these values and
also enables other registers to enable / disable the engine.
Creates the following device-tree entries to provide RxFIFO address,
RxFIFO size, Fifo priority, lpid, pid and tid values so that kernel
can drive P9 NX gzip engine.
The following nodes are located under an xscom node:
/xscom@<xscom_addr>/nx@<nx_addr>
/ibm,gzip-high-fifo : High priority gzip RxFIFO
/ibm,gzip-normal-fifo : Normal priority gzip RxFIFO
Each RxFIFO node contains:
compatible : ibm,p9-nx-gzip
priority : High or Normal
rx-fifo-address : RxFIFO address
rx-fifo-size : RxFIFO size
lpid : 0xfff (1's for 12 bits in UMAC notify match
register)
pid : gzip coprocessor type
tid : counter for gzip
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds changes needed for 842 compression engine on power 9.
Virtual Accelerator Switch (VAS) is used to access NX 842 engine on P9
and the channel setup will be done with receive FIFO. So RxFIFO
address, logical partition ID (lpid), process ID (pid) and thread ID
(tid) are used for this setup. p9 NX supports high and normal priority
FIFOs. skiboot is not involved to process data with 842 engine, but
configures User Mode Access Control (UMAC) noitify match register with
these values and export them to kernel with device-tree entries.
Also configure registers to setup and enable / disable the engine with
the appropriate registers. Creates the following device-tree entries to
provide RxFIFO address, RxFIFO size, Fifo priority, lpid, pid and tid
values so that kernel can drive P9 NX 842 engine.
The following nodes are located under an xscom node:
/xscom@<xscom_addr>/nx@<nx_addr>
/ibm,842-high-fifo : High priority 842 RxFIFO
/ibm,842-normal-fifo : Normal priority 842 RxFIFO
Each RxFIFO node contains:
compatible : ibm,p9-nx-842
priority : High or Normal
rx-fifo-address : RxFIFO address
rx-fifo-size : RXFIFO size
lpid : 0xfff (1's for 12 bits set in UMAC notify
match register)
pid : 842 coprocessor type
tid : Counter for 842
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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P9 NX also supports gzip compression. So this patch creates
nx-compress.c and reorg nx-842.c code so that common functions that are
needed for both 842 and gzip compression will be moved in to
nx-compress.c. This patch does not change the actual functionality.
Signed-off-by: Haren Myneni <hmyneni@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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