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author | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-09-03 13:37:29 +1000 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-11-09 13:12:05 +1100 |
commit | 4744766798df8a295e2b85138ed585a8edfdca7c (patch) | |
tree | fe5d28ff1c93d18a83e7b3fcd2cbbd6c11e95b92 /libpore/p8_pore_table_static_data.c | |
parent | 1205ead9074777c839e6926433dfcf2e20efeac1 (diff) | |
download | skiboot-4744766798df8a295e2b85138ed585a8edfdca7c.zip skiboot-4744766798df8a295e2b85138ed585a8edfdca7c.tar.gz skiboot-4744766798df8a295e2b85138ed585a8edfdca7c.tar.bz2 |
Skip OCCs for chip that has occ_functional set to false
In some simulation environments, we simulate a system close to an
ibm-fsp system but with a crucial difference: we don't simulate OCCs.
This means that for a P8 (well, a simulated one) that looks like it's
part of a ibm-fsp system, we'd wait around for about a minute to be
asked to start OCCs and for the OCCs to start. Obviously, this would
never happen and we'd hit the OCC initialization timeout (correctly)
logging an error.
However, in this simulation environment, it isn't an error as the
required information to work out it isn't an error is (at least now)
provided in hdat under 'OCC Functional State'.
Previously, the ibm,occ-functional-state property was just passed
through the device tree to the host through the XSCOM node and
skiboot ignored it.
This patch takes note of occ-functional-state and skips waiting for
OCCs on any chips that have been marked as having non functional
OCC.
In such simulation environments this means we:
a) don't log an error that isn't really an error
b) boot 1 minute quicker as we don't hit the timeout.
Tested-by: Gajendra B Bandhu1 <gbandhu1@in.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'libpore/p8_pore_table_static_data.c')
0 files changed, 0 insertions, 0 deletions