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authorStewart Smith <stewart@linux.vnet.ibm.com>2015-09-03 13:37:29 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2015-11-09 13:12:05 +1100
commit4744766798df8a295e2b85138ed585a8edfdca7c (patch)
treefe5d28ff1c93d18a83e7b3fcd2cbbd6c11e95b92
parent1205ead9074777c839e6926433dfcf2e20efeac1 (diff)
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Skip OCCs for chip that has occ_functional set to false
In some simulation environments, we simulate a system close to an ibm-fsp system but with a crucial difference: we don't simulate OCCs. This means that for a P8 (well, a simulated one) that looks like it's part of a ibm-fsp system, we'd wait around for about a minute to be asked to start OCCs and for the OCCs to start. Obviously, this would never happen and we'd hit the OCC initialization timeout (correctly) logging an error. However, in this simulation environment, it isn't an error as the required information to work out it isn't an error is (at least now) provided in hdat under 'OCC Functional State'. Previously, the ibm,occ-functional-state property was just passed through the device tree to the host through the XSCOM node and skiboot ignored it. This patch takes note of occ-functional-state and skips waiting for OCCs on any chips that have been marked as having non functional OCC. In such simulation environments this means we: a) don't log an error that isn't really an error b) boot 1 minute quicker as we don't hit the timeout. Tested-by: Gajendra B Bandhu1 <gbandhu1@in.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r--core/chip.c5
-rw-r--r--hw/occ.c7
-rw-r--r--include/chip.h6
3 files changed, 18 insertions, 0 deletions
diff --git a/core/chip.c b/core/chip.c
index f2f1a96..729bccb 100644
--- a/core/chip.c
+++ b/core/chip.c
@@ -96,6 +96,11 @@ void init_chips(void)
0xffffffff);
chip->pcid = dt_prop_get_u32_def(xn, "ibm,proc-chip-id",
0xffffffff);
+ if (dt_prop_get_u32_def(xn, "ibm,occ-functional-state", 1))
+ chip->occ_functional = true;
+ else
+ chip->occ_functional = false;
+
list_head_init(&chip->i2cms);
list_head_init(&chip->lpc_clients);
};
diff --git a/hw/occ.c b/hw/occ.c
index 79140cc..710d8d4 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -99,6 +99,13 @@ static bool wait_for_all_occ_init(void)
chip->id);
return false;
}
+
+ if (!chip->occ_functional) {
+ prlog(PR_WARNING, "OCC: Chip: %x occ not functional\n",
+ chip->id);
+ continue;
+ }
+
/* Get PState table address */
occ_data_area = chip->homer_base + P8_HOMER_SAPPHIRE_DATA_OFFSET;
occ_data = (struct occ_pstate_table *)occ_data_area;
diff --git a/include/chip.h b/include/chip.h
index 5951ef0..5109e25 100644
--- a/include/chip.h
+++ b/include/chip.h
@@ -129,6 +129,12 @@ struct proc_chip {
uint32_t dbob_id;
uint32_t pcid;
+ /* If we expect to have an OCC (i.e. P8) and it is functional,
+ * set TRUE. If something has told us it is not, set FALSE and
+ * we can not wait for OCCs to init. This is only going to be
+ * FALSE in a simulator that doesn't simulate OCCs. */
+ bool occ_functional;
+
/* Used by hw/xscom.c */
uint64_t xscom_base;