diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2021-10-03 11:22:05 +1000 |
|---|---|---|
| committer | Vasant Hegde <hegdevasant@linux.vnet.ibm.com> | 2021-10-19 12:08:19 +0530 |
| commit | b30fb5365fe21f60de13d08bd50524f1ead8fe54 (patch) | |
| tree | 60e6d639cf2a56e6a016547e0baa9d4293aff24b /include | |
| parent | 1996990f769bcb02c4eea6ef774484052ff7e68e (diff) | |
| download | skiboot-b30fb5365fe21f60de13d08bd50524f1ead8fe54.zip skiboot-b30fb5365fe21f60de13d08bd50524f1ead8fe54.tar.gz skiboot-b30fb5365fe21f60de13d08bd50524f1ead8fe54.tar.bz2 | |
cpu: add debug check in cpu_relax
If cpu_relax() is called when not at medium SMT priority, it will lose
the prior priority and return at medium. Add a debug check to catch
this, which would have flagged the previous bug.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/processor.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/processor.h b/include/processor.h index 973d7e7..7a9c499 100644 --- a/include/processor.h +++ b/include/processor.h @@ -71,6 +71,7 @@ #define SPR_USRR1 0x1fb /* RW: Ultravisor Save/Restore Register 1 */ #define SPR_SMFCTRL 0x1ff /* RW: Secure Memory Facility Control */ #define SPR_PSSCR 0x357 /* RW: Stop status and control (ISA 3) */ +#define SPR_PPR32 0x382 #define SPR_TSCR 0x399 #define SPR_HID0 0x3f0 #define SPR_HID1 0x3f1 |