diff options
| -rw-r--r-- | core/cpu.c | 6 | ||||
| -rw-r--r-- | include/processor.h | 1 |
2 files changed, 7 insertions, 0 deletions
@@ -80,6 +80,12 @@ unsigned long __attrconst cpu_emergency_stack_top(unsigned int pir) void __nomcount cpu_relax(void) { + if ((mfspr(SPR_PPR32) >> 18) != 0x4) { + printf("cpu_relax called when not at medium SMT priority: " + "PPR[PRI]=0x%lx\n", mfspr(SPR_PPR32) >> 18); + backtrace(); + } + /* Relax a bit to give sibling threads some breathing space */ smt_lowest(); asm volatile("nop; nop; nop; nop;\n" diff --git a/include/processor.h b/include/processor.h index 973d7e7..7a9c499 100644 --- a/include/processor.h +++ b/include/processor.h @@ -71,6 +71,7 @@ #define SPR_USRR1 0x1fb /* RW: Ultravisor Save/Restore Register 1 */ #define SPR_SMFCTRL 0x1ff /* RW: Secure Memory Facility Control */ #define SPR_PSSCR 0x357 /* RW: Stop status and control (ISA 3) */ +#define SPR_PPR32 0x382 #define SPR_TSCR 0x399 #define SPR_HID0 0x3f0 #define SPR_HID1 0x3f1 |