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2024-04-17MdePkg/BaseLib: Add a new VMGEXIT instruction invocation for SVSMTom Lendacky1-0/+39
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 The SVSM specification relies on a specific register calling convention to hold the parameters that are associated with the SVSM request. The SVSM is invoked by requesting the hypervisor to run the VMPL0 VMSA of the guest using the GHCB MSR Protocol or a GHCB NAE event. Create a new version of the VMGEXIT instruction that will adhere to this calling convention and load the SVSM function arguments into the proper register before invoking the VMGEXIT instruction. On return, perform the atomic exchange on the SVSM call pending value as specified in the SVSM specification. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
2022-03-01MdePkg: Replace Opcode with the corresponding instructions.Jason10-42/+35
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) Signed-off-by: Jason Lou <yun.lou@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
2021-12-07MdePkg: Apply uncrustify changesMichael Kubacki92-504/+191
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07MdePkg: Change OPTIONAL keyword usage styleMichael D Kinney6-16/+14
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760 Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-06-04MdePkg/BaseLib: Fix AsmReadSs() with GCC toolchainSatoshi Tanda1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3405 AsmReadSs() in Ia32/GccInlinePriv.c and X64/GccInlinePriv.c return the DS segment selector value instead of SS. Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-04-08MdePkg/Baseib: Filter/trace MSR access for IA32/X64Dandan Bi3-24/+74
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-04-06MdePkg/BaseLib: Add support for the XSETBV instructionJiaxin Wu1-0/+34
*v2: refine the coding format. https://bugzilla.tianocore.org/show_bug.cgi?id=3284 This patch is to support XSETBV instruction so as to support Extended Control Register(XCR) write. Extended Control Register(XCR) read has already been supported by below commit to support XGETBV instruction: 9b3ca509abd4e45439bbdfe2c2fa8780c950320a Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ni Ray <ray.ni@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Signed-off-by: Jiaxin Wu <Jiaxin.wu@intel.com> Signed-off-by: Zhang Hongbin1 <hongbin1.zhang@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-08-16MdePkg/BaseLib: Add support for the VMGEXIT instructionTom Lendacky1-0/+38
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 VMGEXIT is a new instruction used for Hypervisor/Guest communication when running as an SEV-ES guest. A VMGEXIT will cause an automatic exit (AE) to occur, resulting in a #VMEXIT with an exit code value of 0x403. Since SEV-ES is only supported in X64, provide the necessary X64 support to execute the VMGEXIT instruction, which is coded as "rep vmmcall". For IA32, since "vmmcall" is not supported in NASM 32-bit mode and VMGEXIT should never be called, provide a stub implementation that is identical to CpuBreakpoint(). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-08-16MdePkg/BaseLib: Add support for the XGETBV instructionTom Lendacky1-0/+31
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a CPUID instruction requires the current value of the XCR0 register. In order to retrieve that value, the XGETBV instruction needs to be executed. Provide the necessary support to execute the XGETBV instruction. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-07-15MdePkg/BaseLib: Break out IA32/X64 GCC inline privileged functionsMichael D Kinney2-1180/+1171
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2800 Break out the IA32/X64 GCC inline functions that can not be used in a unit test host application into their own source file. This does not make any changes to the BaseLib library instance. This is in preparation for a new BaseLib instances that is safe to use with host-based unit test applications. Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-15MdePkg/BaseLib: Remove LongJump.c and SetJump.cShenglei Zhang2-165/+0
MdePkg BaseLib still uses the inline X86 assembly code in C code files.For now, inline SetJump/LongJump() can be removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1163 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-09MdePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney189-1323/+189
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseLib: Remove .S files for IA32 and X64 archShenglei Zhang27-1491/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-02-28MdePkg/BaseLib: Add Shadow Stack Support for X86.Yao, Jiewen4-4/+100
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521 This patch adds SSP - shadow stack pointer to JumpBuffer. It will be used for the platform that enabled CET/ShadowStack. We add gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask to control the global enable/disable. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2018-09-30MdePkg/BaseLib: Add new AsmLfence APIHao Wu1-0/+36
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193 This commit will add a new BaseLib API AsmLfence(). This API will perform a serializing operation on all load-from-memory instructions that were issued prior to the call of this function. Please note that this API is only available on IA-32 and x64. The purpose of adding this API is to mitigate of the [CVE-2017-5753] Bounds Check Bypass issue when untrusted data are being processed within SMM. More details can be referred at the 'Bounds check bypass mitigation' section at the below link: https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2018-06-28MdePkg: Clean up source filesLiming Gao11-131/+131
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-07MdePkg: Remove X86 ASM and S filesLiming Gao93-4401/+0
NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2018-01-10MdePkg/BaseLib: add attribute 'RETURNS_TWICE' to SetJumpM1cha1-0/+1
When compiling with any ARM toolchain and Os, registers can get trashed when returning for the second time from SetJump because GCC only handles this correctly when using standard names like 'setjmp' or 'getcontext'. When different names are used you have to use the attribute 'returns_twice' to tell gcc to be extra careful. example: extern int FN_NAME(void*); void jmp_buf_set(void *jmpb, void (*f)(void)) { if (!FN_NAME(jmpb)) f(); } this code produces this wrong code with Os: 00000000 <jmp_buf_set>: 0: e92d4010 push {r4, lr} 4: e1a04001 mov r4, r1 8: ebfffffe bl 0 <nonstandard_setjmp> c: e3500000 cmp r0, #0 10: 01a03004 moveq r3, r4 14: 08bd4010 popeq {r4, lr} 18: 012fff13 bxeq r3 1c: e8bd4010 pop {r4, lr} 20: e12fff1e bx lr The generated code pushes backups of r4 and lr to the stack and then saves all registers using nonstandard_setjmp. Then it pops the stack and jumps to the function in r3 which is the main problem because now the function can overwrite our register backups on the stack. When we return a second time from the call to nonstandard_setjmp, the stack pointer has it's original(pushed) position and when the code pops r4 and lr from the stack the values are not guaranteed to be the same. When using a standard name like setjmp or getcontext or adding '__attribute__((returns_twice))' to nonstandard_setjmp's declaration the code looks different: 00000000 <jmp_buf_set>: 0: e92d4007 push {r0, r1, r2, lr} 4: e58d1004 str r1, [sp, #4] 8: ebfffffe bl 0 <setjmp> c: e3500000 cmp r0, #0 10: 059d3004 ldreq r3, [sp, #4] 14: 01a0e00f moveq lr, pc 18: 012fff13 bxeq r3 1c: e28dd00c add sp, sp, #12 20: e49de004 pop {lr} ; (ldr lr, [sp], #4) 24: e12fff1e bx lr Here the problem is being solved by restoring r3 from the stack without popping it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08MdePkg/BaseLib: Add stack switch related definitions for IA32Jian J Wang1-0/+36
The new definitions include two structures IA32_TASK_STATE_SEGMENT IA32_TSS_DESCRIPTOR two macros IA32_GDT_TYPE_TSS IA32_GDT_ALIGNMENT and one API VOID EFIAPI AsmWriteTr ( IN UINT16 Selector ); They're needed to setup task gate and interrupt stack table for stack switch. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Reviewed-by: Jiewen.yao@intel.com
2017-11-14MdePkg: Fix MSFT C4255 warningSong, BinX1-1/+1
V2: Fix MSFT C4255 warning V1: Enable MSFT C4255 warning. From MSDN: Compiler Warning (level 4) C4255 function' : no function prototype given: converting '()' to '(void)' The compiler did not find an explicit list of arguments to a function. This warning is for the C compiler only. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bell Song <binx.song@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-16MdePkg/BaseLib: Add one wrapper on RdRand access for parameter check.Qin Long3-30/+30
Add one wrapper implementation over assembly RdRand access to check possible NULL parameter, for better alignment with comment description. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qin Long <qin.long@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-10-18MdePkg/BaseLib: Remove the unnecessary '_' before library APIs in ASM/NASMHao Wu10-30/+30
The leading underscore (i.e. '_') before the names of some BaseLib library API in ASM/NASM files is unnecessary. It will cause link error with GCC tool chains. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-07-20MdePkg BaseLib: Add the missing nasm source file InternalSwitchStack.nasmLiming Gao1-0/+47
BaseLib Ia32 InternalSwitchStack.S has no matched InternalSwitchStack.nasm. Use ObjDump to verify the output object files be same. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/DisablePaging32.asm to NASMLiming Gao1-0/+54
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/DisablePaging32.asm to Ia32/DisablePaging32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/DisableCache.asm to NASMJordan Justen1-0/+42
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/DisableCache.asm to Ia32/DisableCache.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/EnableCache.asm to NASMJordan Justen1-0/+42
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/EnableCache.asm to Ia32/EnableCache.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/ARShiftU64.asm to NASMJordan Justen1-0/+45
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ARShiftU64.asm to Ia32/ARShiftU64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/CpuBreakpoint.asm to NASMJordan Justen1-0/+36
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CpuBreakpoint.asm to Ia32/CpuBreakpoint.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/CpuId.asm to NASMJordan Justen1-0/+65
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CpuId.asm to Ia32/CpuId.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/CpuIdEx.asm to NASMJordan Justen1-0/+67
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CpuIdEx.asm to Ia32/CpuIdEx.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/CpuPause.asm to NASMJordan Justen1-0/+36
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CpuPause.asm to Ia32/CpuPause.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/DisableInterrupts.asm to NASMJordan Justen1-0/+37
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/DisableInterrupts.asm to Ia32/DisableInterrupts.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/DivU64x32.asm to NASMJordan Justen1-0/+43
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/DivU64x32.asm to Ia32/DivU64x32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/DivU64x32Remainder.asm to NASMJordan Justen1-0/+48
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/DivU64x32Remainder.asm to Ia32/DivU64x32Remainder.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/EnableDisableInterrupts.asm to NASMJordan Justen1-0/+38
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/EnableDisableInterrupts.asm to Ia32/EnableDisableInterrupts.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/EnableInterrupts.asm to NASMJordan Justen1-0/+37
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/EnableInterrupts.asm to Ia32/EnableInterrupts.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/EnablePaging32.asm to NASMJordan Justen1-0/+54
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/EnablePaging32.asm to Ia32/EnablePaging32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/FlushCacheLine.asm to NASMJordan Justen1-0/+51
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/FlushCacheLine.asm to Ia32/FlushCacheLine.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/FxSave.asm to NASMJordan Justen1-0/+38
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/FxSave.asm to Ia32/FxSave.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/FxRestore.asm to NASMJordan Justen1-0/+38
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/FxRestore.asm to Ia32/FxRestore.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/Invd.asm to NASMJordan Justen1-0/+37
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/Invd.asm to Ia32/Invd.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/LongJump.asm to NASMJordan Justen1-0/+43
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/LongJump.asm to Ia32/LongJump.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/LRotU64.asm to NASMJordan Justen1-0/+50
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/LRotU64.asm to Ia32/LRotU64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/LShiftU64.asm to NASMJordan Justen1-0/+45
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/LShiftU64.asm to Ia32/LShiftU64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/MultU64x32.asm to NASMJordan Justen1-0/+40
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/MultU64x32.asm to Ia32/MultU64x32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/MultU64x64.asm to NASMJordan Justen1-0/+46
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/MultU64x64.asm to Ia32/MultU64x64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/ModU64x32.asm to NASMJordan Justen1-0/+42
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ModU64x32.asm to Ia32/ModU64x32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/Monitor.asm to NASMJordan Justen1-0/+42
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/Monitor.asm to Ia32/Monitor.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/Mwait.asm to NASMJordan Justen1-0/+40
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/Mwait.asm to Ia32/Mwait.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseLib: Convert Ia32/ReadCr0.asm to NASMJordan Justen1-0/+37
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ReadCr0.asm to Ia32/ReadCr0.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
generated by cgit v1.1 at 2024-10-04 04:38:51 +0000