diff options
Diffstat (limited to 'OvmfPkg/PlatformPei/MemDetect.c')
| -rw-r--r-- | OvmfPkg/PlatformPei/MemDetect.c | 36 |
1 files changed, 13 insertions, 23 deletions
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 0c755c4..493cb1f 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -89,32 +89,22 @@ Q35SmramAtDefaultSmbaseInitialization ( )
{
RETURN_STATUS PcdStatus;
+ UINTN CtlReg;
+ UINT8 CtlRegVal;
ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
- PlatformInfoHob->Q35SmramAtDefaultSmbase = FALSE;
- if (FeaturePcdGet (PcdCsmEnable)) {
- DEBUG ((
- DEBUG_INFO,
- "%a: SMRAM at default SMBASE not checked due to CSM\n",
- __func__
- ));
- } else {
- UINTN CtlReg;
- UINT8 CtlRegVal;
-
- CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
- PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
- CtlRegVal = PciRead8 (CtlReg);
- PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
- MCH_DEFAULT_SMBASE_IN_RAM);
- DEBUG ((
- DEBUG_INFO,
- "%a: SMRAM at default SMBASE %a\n",
- __func__,
- PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
- ));
- }
+ CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
+ PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
+ CtlRegVal = PciRead8 (CtlReg);
+ PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
+ MCH_DEFAULT_SMBASE_IN_RAM);
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: SMRAM at default SMBASE %a\n",
+ __func__,
+ PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
+ ));
PcdStatus = PcdSetBoolS (
PcdQ35SmramAtDefaultSmbase,
|