diff options
| -rw-r--r-- | OvmfPkg/IntelTdx/IntelTdxX64.dsc | 1 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkg.dec | 5 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgIa32.dsc | 1 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgIa32X64.dsc | 1 | ||||
| -rw-r--r-- | OvmfPkg/OvmfPkgX64.dsc | 1 | ||||
| -rw-r--r-- | OvmfPkg/OvmfXen.dsc | 1 | ||||
| -rw-r--r-- | OvmfPkg/PlatformPei/MemDetect.c | 36 | ||||
| -rw-r--r-- | OvmfPkg/PlatformPei/PlatformPei.inf | 1 |
8 files changed, 13 insertions, 34 deletions
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc index 273f3b1..ba1e010 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -378,7 +378,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
!ifdef $(CSM_ENABLE)
!error "CSM is being torn down"
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
!endif
!if $(SECURE_BOOT_ENABLE) == TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootSupported|TRUE
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index e3861e5..74cc870 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -497,8 +497,3 @@ ## This feature flag indicates the firmware build supports secure boot.
gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootSupported|FALSE|BOOLEAN|0x6d
-
- ## Informs modules (including pre-DXE-phase modules) whether the platform
- # firmware contains a CSM (Compatibility Support Module).
- #
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index ca32da9..d3e3c35 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -473,7 +473,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
!ifdef $(CSM_ENABLE)
!error "CSM is being torn down"
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
!endif
!if $(SMM_REQUIRE) == TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index b0e8e0b..b590e0f 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -480,7 +480,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
!ifdef $(CSM_ENABLE)
!error "CSM is being torn down"
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
!endif
!if $(SMM_REQUIRE) == TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 23a3bcd..8531e64 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -499,7 +499,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
!ifdef $(CSM_ENABLE)
!error "CSM is being torn down"
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
!endif
!if $(SMM_REQUIRE) == TRUE
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index 2346a63..fb2cd07 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -365,7 +365,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
!ifdef $(CSM_ENABLE)
!error "CSM is being torn down"
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE
!endif
[PcdsFixedAtBuild]
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 0c755c4..493cb1f 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -89,32 +89,22 @@ Q35SmramAtDefaultSmbaseInitialization ( )
{
RETURN_STATUS PcdStatus;
+ UINTN CtlReg;
+ UINT8 CtlRegVal;
ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
- PlatformInfoHob->Q35SmramAtDefaultSmbase = FALSE;
- if (FeaturePcdGet (PcdCsmEnable)) {
- DEBUG ((
- DEBUG_INFO,
- "%a: SMRAM at default SMBASE not checked due to CSM\n",
- __func__
- ));
- } else {
- UINTN CtlReg;
- UINT8 CtlRegVal;
-
- CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
- PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
- CtlRegVal = PciRead8 (CtlReg);
- PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
- MCH_DEFAULT_SMBASE_IN_RAM);
- DEBUG ((
- DEBUG_INFO,
- "%a: SMRAM at default SMBASE %a\n",
- __func__,
- PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
- ));
- }
+ CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);
+ PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);
+ CtlRegVal = PciRead8 (CtlReg);
+ PlatformInfoHob->Q35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==
+ MCH_DEFAULT_SMBASE_IN_RAM);
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: SMRAM at default SMBASE %a\n",
+ __func__,
+ PlatformInfoHob->Q35SmramAtDefaultSmbase ? "found" : "not found"
+ ));
PcdStatus = PcdSetBoolS (
PcdQ35SmramAtDefaultSmbase,
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf index 3934aee..ad52be3 100644 --- a/OvmfPkg/PlatformPei/PlatformPei.inf +++ b/OvmfPkg/PlatformPei/PlatformPei.inf @@ -133,7 +133,6 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize
[FeaturePcd]
- gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
[Ppis]
|