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author | Laszlo Ersek <lersek@redhat.com> | 2017-07-04 13:16:39 +0200 |
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committer | Laszlo Ersek <lersek@redhat.com> | 2017-07-05 22:25:03 +0200 |
commit | 1372f8d347abc9f69c6342a1e985ff400d171ac8 (patch) | |
tree | 3cb0d679987122e88e0d8dd066032ffc7400d058 /OvmfPkg/SmmAccess/SmmAccessPei.c | |
parent | 23bfb5c0aab6bda348ac03e160d4a8432031fac1 (diff) | |
download | edk2-1372f8d347abc9f69c6342a1e985ff400d171ac8.zip edk2-1372f8d347abc9f69c6342a1e985ff400d171ac8.tar.gz edk2-1372f8d347abc9f69c6342a1e985ff400d171ac8.tar.bz2 |
OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei.
Jordan suggested to use gEfiPeiMemoryDiscoveredPpiGuid as SmmAccessPei's
DEPEX for making sure that PlatformPei sets the PCD before SmmAccessPei
consumes it. (PlatformPei installs the permanent PEI RAM.) Such a DEPEX is
supposed to mirror physical firmware, where anything related to SMRAM
cannot run before said platform's physical RAM is discovered (signaled by
the presence of gEfiPeiMemoryDiscoveredPpiGuid).
Introduce the InitQ35TsegMbytes() function and the "mQ35TsegMbytes" extern
variable to "SmramInternal.h" and "SmramInternal.c":
- Both SmmAccess modules (PEIM and DXE driver) are supposed to call
InitQ35TsegMbytes() in their respective entry point functions, saving
PcdQ35TsegMbytes into "mQ35TsegMbytes". This way dynamic PCD fetches can
be kept out of PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member
functions later (when we add support for extended TSEG size).
- We can thus replace the current PcdQ35TsegMbytes fetches in
SmmAccessPei's entry point function as well, with reads from
"mQ35TsegMbytes".
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'OvmfPkg/SmmAccess/SmmAccessPei.c')
-rw-r--r-- | OvmfPkg/SmmAccess/SmmAccessPei.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c index 76790e3..a3631a1 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -318,8 +318,9 @@ SmmAccessPeiEntryPoint ( //
// Set TSEG Memory Base.
//
+ InitQ35TsegMbytes ();
PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
- (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+ (TopOfLowRamMb - mQ35TsegMbytes) << MCH_TSEGMB_MB_SHIFT);
//
// Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
@@ -327,8 +328,8 @@ SmmAccessPeiEntryPoint ( // *restricted* to SMM.
//
EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
- EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
- FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+ EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
+ mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
MCH_ESMRAMC_TSEG_1MB;
EsmramcVal |= MCH_ESMRAMC_T_EN;
PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
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