diff options
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccess2Dxe.c | 1 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccess2Dxe.inf | 3 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccessPei.c | 7 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccessPei.inf | 4 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmramInternal.c | 17 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmramInternal.h | 13 |
6 files changed, 40 insertions, 5 deletions
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c index d513039..0a99cc5 100644 --- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c +++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c @@ -149,6 +149,7 @@ SmmAccess2DxeEntryPoint ( //
ASSERT (FeaturePcdGet (PcdSmmSmramRequire));
+ InitQ35TsegMbytes ();
GetStates (&mAccess2.LockState, &mAccess2.OpenState);
return gBS->InstallMultipleProtocolInterfaces (&ImageHandle,
&gEfiSmmAccess2ProtocolGuid, &mAccess2,
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf index 31e4dfa..1bc88fa 100644 --- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf +++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf @@ -54,5 +54,8 @@ [FeaturePcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
+[Pcd]
+ gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
+
[Depex]
TRUE
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c index 76790e3..a3631a1 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -318,8 +318,9 @@ SmmAccessPeiEntryPoint ( //
// Set TSEG Memory Base.
//
+ InitQ35TsegMbytes ();
PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
- (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+ (TopOfLowRamMb - mQ35TsegMbytes) << MCH_TSEGMB_MB_SHIFT);
//
// Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
@@ -327,8 +328,8 @@ SmmAccessPeiEntryPoint ( // *restricted* to SMM.
//
EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
- EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
- FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+ EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
+ mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
MCH_ESMRAMC_TSEG_1MB;
EsmramcVal |= MCH_ESMRAMC_T_EN;
PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAccessPei.inf index 3908b08..09f3b63 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.inf +++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf @@ -59,11 +59,11 @@ [FeaturePcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
-[FixedPcd]
+[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
[Ppis]
gPeiSmmAccessPpiGuid ## PRODUCES
[Depex]
- TRUE
+ gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c index c3267ca..9918a45 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.c +++ b/OvmfPkg/SmmAccess/SmramInternal.c @@ -17,10 +17,27 @@ #include <Guid/AcpiS3Context.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
#include <Library/PciLib.h>
#include "SmramInternal.h"
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+UINT16 mQ35TsegMbytes;
+
+/**
+ Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+InitQ35TsegMbytes (
+ VOID
+ )
+{
+ mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+}
+
/**
Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
diff --git a/OvmfPkg/SmmAccess/SmramInternal.h b/OvmfPkg/SmmAccess/SmramInternal.h index 4e9ac05..82b867c 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.h +++ b/OvmfPkg/SmmAccess/SmramInternal.h @@ -31,6 +31,19 @@ typedef enum { DescIdxCount = 2
} DESCRIPTOR_INDEX;
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+extern UINT16 mQ35TsegMbytes;
+
+/**
+ Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+InitQ35TsegMbytes (
+ VOID
+ );
+
/**
Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
|