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authorPierre Gondois <pierre.gondois@arm.com>2024-03-11 16:05:46 +0100
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-06-15 03:57:14 +0000
commitcf323e2839ce260fde43487baae205527dee1b2f (patch)
treed8b68783f0dde2e51f828edbb13e03a15b341c85 /ArmPkg
parentc68fb69dfefa7a76ebad33674a49632c4f8c6926 (diff)
downloadedk2-cf323e2839ce260fde43487baae205527dee1b2f.zip
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ArmPkg,MdePkg: Move ArmPkg/Chipset/Aarch64[|Mmu].h to MdePkg
Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/Aarch64[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Diffstat (limited to 'ArmPkg')
-rw-r--r--ArmPkg/Include/Chipset/ArmV7.h122
-rw-r--r--ArmPkg/Include/Chipset/ArmV7Mmu.h216
-rw-r--r--ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c2
-rw-r--r--ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c2
-rw-r--r--ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c2
-rw-r--r--ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c2
-rw-r--r--ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c2
7 files changed, 5 insertions, 343 deletions
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
deleted file mode 100644
index 94620c0..0000000
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef ARM_V7_H_
-#define ARM_V7_H_
-
-#include <Chipset/ArmV7Mmu.h>
-
-// ARM Interrupt ID in Exception Table
-#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
-
-// ID_PFR1 - ARM Processor Feature Register 1 definitions
-#define ARM_PFR1_SEC (0xFUL << 4)
-#define ARM_PFR1_TIMER (0xFUL << 16)
-#define ARM_PFR1_GIC (0xFUL << 28)
-
-// Domain Access Control Register
-#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
-#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
-
-// CPSR - Coprocessor Status Register definitions
-#define CPSR_MODE_USER 0x10
-#define CPSR_MODE_FIQ 0x11
-#define CPSR_MODE_IRQ 0x12
-#define CPSR_MODE_SVC 0x13
-#define CPSR_MODE_ABORT 0x17
-#define CPSR_MODE_HYP 0x1A
-#define CPSR_MODE_UNDEFINED 0x1B
-#define CPSR_MODE_SYSTEM 0x1F
-#define CPSR_MODE_MASK 0x1F
-#define CPSR_ASYNC_ABORT (1 << 8)
-#define CPSR_IRQ (1 << 7)
-#define CPSR_FIQ (1 << 6)
-
-// CPACR - Coprocessor Access Control Register definitions
-#define CPACR_CP_DENIED(cp) 0x00
-#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)
-#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)
-#define CPACR_ASEDIS (1 << 31)
-#define CPACR_D32DIS (1 << 30)
-#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF
-
-// NSACR - Non-Secure Access Control Register definitions
-#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)
-#define NSACR_NSD32DIS (1 << 14)
-#define NSACR_NSASEDIS (1 << 15)
-#define NSACR_PLE (1 << 16)
-#define NSACR_TL (1 << 17)
-#define NSACR_NS_SMP (1 << 18)
-#define NSACR_RFR (1 << 19)
-
-// SCR - Secure Configuration Register definitions
-#define SCR_NS (1 << 0)
-#define SCR_IRQ (1 << 1)
-#define SCR_FIQ (1 << 2)
-#define SCR_EA (1 << 3)
-#define SCR_FW (1 << 4)
-#define SCR_AW (1 << 5)
-
-// MIDR - Main ID Register definitions
-#define ARM_CPU_TYPE_SHIFT 4
-#define ARM_CPU_TYPE_MASK 0xFFF
-#define ARM_CPU_TYPE_AEMV8 0xD0F
-#define ARM_CPU_TYPE_A53 0xD03
-#define ARM_CPU_TYPE_A57 0xD07
-#define ARM_CPU_TYPE_A15 0xC0F
-#define ARM_CPU_TYPE_A12 0xC0D
-#define ARM_CPU_TYPE_A9 0xC09
-#define ARM_CPU_TYPE_A7 0xC07
-#define ARM_CPU_TYPE_A5 0xC05
-
-#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
-#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
-
-#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
-
-VOID
-EFIAPI
-ArmEnableSWPInstruction (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadCbar (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmReadTpidrurw (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteTpidrurw (
- UINTN Value
- );
-
-UINT32
-EFIAPI
-ArmReadNsacr (
- VOID
- );
-
-VOID
-EFIAPI
-ArmWriteNsacr (
- IN UINT32 Nsacr
- );
-
-#endif // ARM_V7_H_
diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h
deleted file mode 100644
index 89b81e3..0000000
--- a/ArmPkg/Include/Chipset/ArmV7Mmu.h
+++ /dev/null
@@ -1,216 +0,0 @@
-/** @file
-*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#ifndef ARMV7_MMU_H_
-#define ARMV7_MMU_H_
-
-#define TTBR_NOT_OUTER_SHAREABLE BIT5
-#define TTBR_RGN_OUTER_NON_CACHEABLE 0
-#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3
-#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4
-#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)
-#define TTBR_SHAREABLE BIT1
-#define TTBR_NON_SHAREABLE 0
-#define TTBR_INNER_CACHEABLE BIT0
-#define TTBR_INNER_NON_CACHEABLE 0
-#define TTBR_RGN_INNER_NON_CACHEABLE 0
-#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
-#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
-#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)
-
-#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
-#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
-
-#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
-#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
-#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
-#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
-
-#define TRANSLATION_TABLE_SECTION_COUNT 4096
-#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
-#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
-#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
-
-#define TRANSLATION_TABLE_PAGE_COUNT 256
-#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
-#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
-#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
-
-#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
-
-// Translation table descriptor types
-#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)
-#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)
-#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))
-#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
-
-// Translation table descriptor types
-#define TT_DESCRIPTOR_PAGE_TYPE_MASK (1UL << 1)
-#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 1)
-#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (1UL << 1)
-
-// Section descriptor definitions
-#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)
-
-#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)
-#define TT_DESCRIPTOR_SECTION_NS (1UL << 19)
-
-#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)
-#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)
-#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)
-
-#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)
-#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)
-#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)
-
-#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)
-#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)
-#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)
-
-#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)
-#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)
-#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)
-
-#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (1UL << 11))
-#define TT_DESCRIPTOR_SECTION_AP_NO_RW ((0UL << 15) | (0UL << 11))
-#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (1UL << 11))
-#define TT_DESCRIPTOR_SECTION_AP_NO_RO ((1UL << 15) | (0UL << 11))
-#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (1UL << 11))
-
-#define TT_DESCRIPTOR_SECTION_AF (1UL << 10)
-
-#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (1UL << 5))
-#define TT_DESCRIPTOR_PAGE_AP_NO_RW ((0UL << 9) | (0UL << 5))
-#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (1UL << 5))
-#define TT_DESCRIPTOR_PAGE_AP_NO_RO ((1UL << 9) | (0UL << 5))
-#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (1UL << 5))
-
-#define TT_DESCRIPTOR_PAGE_AF (1UL << 4)
-
-#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)
-#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)
-
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
-
-#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000)
-
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3)
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))
-#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))
-
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AF(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AF) >> 6) & TT_DESCRIPTOR_PAGE_AF)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc) ((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))
-
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_S(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_S_MASK) << 6) & TT_DESCRIPTOR_SECTION_S_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AF(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AF) << 6) & TT_DESCRIPTOR_SECTION_AF)
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_XN(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_XN_MASK) << 4) & TT_DESCRIPTOR_SECTION_XN_MASK)
-#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc) ((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))
-
-#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
- TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \
- TT_DESCRIPTOR_SECTION_AF | \
- TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK)
-
-#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
- TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \
- TT_DESCRIPTOR_PAGE_AF | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK)
-
-#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)
-#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)
-
-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)
-#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)
-#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
-#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20
-
-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)
-#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)
-#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
-#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12
-
-#define TT_DESCRIPTOR_SECTION_DEFAULT (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_AF)
-
-#define TT_DESCRIPTOR_SECTION_WRITE_BACK (TT_DESCRIPTOR_SECTION_DEFAULT | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
-
-#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH (TT_DESCRIPTOR_SECTION_DEFAULT | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
-
-#define TT_DESCRIPTOR_SECTION_DEVICE (TT_DESCRIPTOR_SECTION_DEFAULT | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
-
-#define TT_DESCRIPTOR_SECTION_UNCACHED (TT_DESCRIPTOR_SECTION_DEFAULT | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
-
-#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_AF | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)
-#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_AF | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
-#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_AF | \
- TT_DESCRIPTOR_PAGE_XN_MASK | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)
-#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_AF | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)
-
-// First Level Descriptors
-typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR;
-
-// Second Level Descriptors
-typedef UINT32 ARM_PAGE_TABLE_ENTRY;
-
-UINT32
-ConvertSectionAttributesToPageAttributes (
- IN UINT32 SectionAttributes
- );
-
-#endif // ARMV7_MMU_H_
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c b/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
index fc411b8..7652b97 100644
--- a/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
+++ b/ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c
@@ -11,7 +11,7 @@
#include <Uefi.h>
-#include <Chipset/ArmV7.h>
+#include <Arm/AArch32.h>
#include <Library/ArmLib.h>
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
index 521d5be..6acc4d3 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
+++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
@@ -13,7 +13,7 @@
#include <Library/ArmLib.h>
#include <Library/DebugLib.h>
-#include <Chipset/ArmV7.h>
+#include <Arm/AArch32.h>
#include "ArmV7Lib.h"
#include "ArmLibPrivate.h"
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c
index 52dbfd7..bf3a874 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibConvert.c
@@ -11,7 +11,7 @@
#include <Library/ArmLib.h>
-#include <Chipset/ArmV7.h>
+#include <Arm/AArch32.h>
UINT32
ConvertSectionAttributesToPageAttributes (
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
index 28e4cd9..60dc6c9 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
@@ -8,7 +8,7 @@
**/
#include <Uefi.h>
-#include <Chipset/ArmV7.h>
+#include <Arm/AArch32.h>
#include <Library/BaseMemoryLib.h>
#include <Library/CacheMaintenanceLib.h>
#include <Library/MemoryAllocationLib.h>
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
index 548ee13..5e751cd 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c
@@ -17,7 +17,7 @@
#include <Library/CacheMaintenanceLib.h>
#include <Library/MemoryAllocationLib.h>
-#include <Chipset/ArmV7.h>
+#include <Arm/AArch32.h>
#define __EFI_MEMORY_RWX 0 // no restrictions