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2014-04-28tcg-sparc: Accept stores of zeroRichard Henderson1-2/+2
2014-04-28tcg-sparc: Fix small 32-bit moviRichard Henderson1-0/+5
2014-04-28tcg-sparc: Fixup function argument typesRichard Henderson1-66/+51
2014-04-28tcg-sparc: Hoist common argument loads in tcg_out_opRichard Henderson1-63/+60
2014-04-28tcg-sparc: Don't handle mov/movi in tcg_out_opRichard Henderson1-7/+6
2014-04-28tcg-sparc: Tidy check_fit_* testsRichard Henderson1-15/+20
2014-04-28tcg-sparc: Implement muls2_i32Richard Henderson2-4/+16
2014-04-28tcg-sparc: Use the RETURN instructionRichard Henderson1-4/+10
2014-04-28tcg-sparc: Use 64-bit registers with sparcv8plusRichard Henderson3-361/+258
2014-04-28tcg-sparc: Support trunc_shr_i32Richard Henderson2-1/+9
2014-04-28tcg-sparc: Remove most uses of TCG_TARGET_REG_BITSRichard Henderson1-33/+37
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson12-16/+67
2014-04-28tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changesRichard Henderson1-2/+2
2014-04-24Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20140422' into stagingPeter Maydell25-157/+160
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson12-32/+12
2014-04-18tcg: Fix fallback from muls2_i64 to mulu2_i64Richard Henderson1-20/+18
2014-04-18tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32Richard Henderson1-4/+2
2014-04-18tcg: Relax requirement for mulu2_i32 on 32-bit hostsRichard Henderson5-1/+12
2014-04-18tcg-s390: Remove W constraintRichard Henderson1-24/+19
2014-04-18tcg-sparc: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+7
2014-04-18tcg-ppc64: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+9
2014-04-18tcg-aarch64: Remove w constraintRichard Henderson1-22/+18
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson11-13/+13
2014-04-18tcg: Fix out of range shift in deposit optimizationsRichard Henderson1-6/+4
2014-04-18tcg: Mask shift quantities while foldingRichard Henderson1-15/+20
2014-04-18tcg: Use "unspecified behavior" for shiftsRichard Henderson1-5/+13
2014-04-18tcg: Fix warning (1 bit signed bitfield entry) and replace int by boolStefan Weil5-13/+13
2014-04-17tcg-ia64: Convert to new ldst opcodesRichard Henderson2-67/+35
2014-04-17tcg-ia64: Move part of softmmu slow path out of lineRichard Henderson1-62/+114
2014-04-17tcg-ia64: Convert to new ldst helpersRichard Henderson1-62/+80
2014-04-17tcg-ia64: Reduce code duplication in tcg_out_qemu_ldRichard Henderson1-37/+24
2014-04-17tcg-ia64: Move tlb addend load into tlb readRichard Henderson1-12/+12
2014-04-17tcg-ia64: Move bswap for store into tlb loadRichard Henderson1-63/+31
2014-04-17tcg-ia64: Re-bundle the tlb loadRichard Henderson1-23/+54
2014-04-17tcg-ia64: Optimize small arguments to exit_tbRichard Henderson1-3/+9
2014-04-16tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movrRichard Henderson1-9/+7
2014-04-16tcg-aarch64: Prefer unsigned offsets before signed offsets for ldstRichard Henderson1-5/+6
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313Richard Henderson1-87/+89
2014-04-16tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_opRichard Henderson1-83/+32
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3507Richard Henderson1-24/+33
2014-04-16tcg-aarch64: Support stores of zeroRichard Henderson1-16/+19
2014-04-16tcg-aarch64: Implement TCG_TARGET_HAS_new_ldstRichard Henderson2-60/+31
2014-04-16tcg-aarch64: Pass qemu_ld/st arguments directlyRichard Henderson1-32/+17
2014-04-16tcg-aarch64: Use TCGMemOp in qemu_ld/stRichard Henderson1-68/+63
2014-04-16tcg-aarch64: Use ADR to pass the return address to the ld/st helpersRichard Henderson1-2/+9
2014-04-16tcg-aarch64: Use tcg_out_call for qemu_ld/stRichard Henderson1-4/+2
2014-04-16tcg-aarch64: Avoid add with zero in tlb loadRichard Henderson1-9/+19
2014-04-16tcg-aarch64: Implement tcg_register_jitRichard Henderson1-15/+69
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3314Richard Henderson1-67/+33
2014-04-16tcg-aarch64: Reuse LR in translated codeRichard Henderson2-33/+33
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