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author | Richard Henderson <rth@twiddle.net> | 2014-03-18 08:21:44 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2014-04-18 16:57:36 -0700 |
commit | 20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a (patch) | |
tree | 23c354810892c26a639ad0ef95f5011ce1685fa0 /tcg | |
parent | ad5171dbd419ffa9e10de766e1c3198f2ae62dfa (diff) | |
download | qemu-20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a.zip qemu-20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a.tar.gz qemu-20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a.tar.bz2 |
tcg: Use "unspecified behavior" for shifts
Change the definition such that shifts are not allowed to crash
for any input.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/README | 18 |
1 files changed, 13 insertions, 5 deletions
@@ -36,6 +36,12 @@ or a memory location which is stored in a register outside QEMU TBs A TCG "basic block" corresponds to a list of instructions terminated by a branch instruction. +An operation with "undefined behavior" may result in a crash. + +An operation with "unspecified behavior" shall not crash. However, +the result may be one of several possibilities so may be considered +an "undefined result". + 3) Intermediate representation 3.1) Introduction @@ -239,23 +245,25 @@ t0=t1|~t2 * shl_i32/i64 t0, t1, t2 -t0=t1 << t2. Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) +t0=t1 << t2. Unspecified behavior if t2 < 0 or t2 >= 32 (resp 64) * shr_i32/i64 t0, t1, t2 -t0=t1 >> t2 (unsigned). Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) +t0=t1 >> t2 (unsigned). Unspecified behavior if t2 < 0 or t2 >= 32 (resp 64) * sar_i32/i64 t0, t1, t2 -t0=t1 >> t2 (signed). Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) +t0=t1 >> t2 (signed). Unspecified behavior if t2 < 0 or t2 >= 32 (resp 64) * rotl_i32/i64 t0, t1, t2 -Rotation of t2 bits to the left. Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) +Rotation of t2 bits to the left. +Unspecified behavior if t2 < 0 or t2 >= 32 (resp 64) * rotr_i32/i64 t0, t1, t2 -Rotation of t2 bits to the right. Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) +Rotation of t2 bits to the right. +Unspecified behavior if t2 < 0 or t2 >= 32 (resp 64) ********* Misc |