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2024-02-29tcg/optimize: fix uninitialized variablePaolo Bonzini1-1/+2
2024-02-29tcg/aarch64: Apple does not align __int128_t in even registersRichard Henderson1-1/+5
2024-02-13tcg/arm: Fix goto_tb for large translation blocksRichard Henderson1-2/+2
2024-02-05tcg/tci: Support TCG_COND_TST{EQ,NE}Richard Henderson2-1/+15
2024-02-05tcg/s390x: Support TCG_COND_TST{EQ,NE}Richard Henderson2-44/+97
2024-02-03tcg/s390x: Add TCG_CT_CONST_CMPRichard Henderson3-21/+58
2024-02-03tcg/s390x: Split constraint A into J+URichard Henderson3-23/+23
2024-02-03tcg/ppc: Support TCG_COND_TST{EQ,NE}Richard Henderson2-9/+115
2024-02-03tcg/ppc: Add TCG_CT_CONST_CMPRichard Henderson3-10/+44
2024-02-03tcg/ppc: Tidy up tcg_target_const_matchRichard Henderson1-11/+16
2024-02-03tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_iselRichard Henderson1-34/+34
2024-02-03tcg/ppc: Sink tcg_to_bc usage into tcg_out_bcRichard Henderson1-11/+17
2024-02-03tcg/sparc64: Support TCG_COND_TST{EQ,NE}Richard Henderson2-3/+15
2024-02-03tcg/sparc64: Pass TCGCond to tcg_out_cmpRichard Henderson1-10/+11
2024-02-03tcg/sparc64: Hoist read of tcg_cond_to_rcondRichard Henderson1-11/+14
2024-02-03tcg/i386: Use TEST r,r to test 8/16/32 bitsPaolo Bonzini1-0/+17
2024-02-03tcg/i386: Improve TSTNE/TESTEQ vs powers of twoRichard Henderson3-8/+53
2024-02-03tcg/i386: Support TCG_COND_TST{EQ,NE}Richard Henderson2-37/+60
2024-02-03tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmpRichard Henderson1-11/+13
2024-02-03tcg/i386: Pass x86 condition codes to tcg_out_cmovRichard Henderson1-8/+8
2024-02-03tcg/arm: Support TCG_COND_TST{EQ,NE}Richard Henderson2-2/+29
2024-02-03tcg/arm: Split out tcg_out_cmp()Richard Henderson1-15/+17
2024-02-03tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAXRichard Henderson1-0/+6
2024-02-03tcg/aarch64: Generate TBZ, TBNZRichard Henderson1-12/+62
2024-02-03tcg/aarch64: Massage tcg_out_brcond()Philippe Mathieu-Daudé1-8/+23
2024-02-03tcg/aarch64: Support TCG_COND_TST{EQ,NE}Richard Henderson4-19/+43
2024-02-03tcg: Add TCGConst argument to tcg_target_const_matchRichard Henderson11-12/+52
2024-02-03tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupportedRichard Henderson3-9/+55
2024-02-03tcg/optimize: Handle TCG_COND_TST{EQ,NE}Richard Henderson1-22/+218
2024-02-03tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2Richard Henderson1-50/+57
2024-02-03tcg/optimize: Split out do_constant_folding_cond1Richard Henderson1-30/+27
2024-02-03tcg/optimize: Split out arg_is_const_valRichard Henderson1-15/+23
2024-02-03tcg: Introduce TCG_TARGET_HAS_tstRichard Henderson10-0/+20
2024-02-03tcg: Introduce TCG_COND_TST{EQ,NE}Richard Henderson1-1/+3
2024-02-03tcg/loongarch64: Set vector registers call clobberedRichard Henderson1-1/+1
2024-01-29accel/tcg: Move perf and debuginfo support to tcg/Ilya Leoshkevich4-1/+483
2024-01-23tcg/arm: Fix SIGILL in tcg_out_qemu_st_directJoseph Burt1-0/+3
2024-01-23tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insnsRichard Henderson1-3/+3
2024-01-23tcg: Make the cleanup-on-error path uniqueSamuel Tardieu1-3/+3
2024-01-23tcg: Remove unreachable codeSamuel Tardieu1-3/+1
2024-01-11tcg/ppc: Use new registers for LQ destinationRichard Henderson3-7/+19
2024-01-11tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediatesPaolo Bonzini1-0/+11
2024-01-11tcg/i386: convert add/sub of 128 to sub/add of -128Paolo Bonzini1-15/+34
2023-12-31meson: remove config_targetosPaolo Bonzini1-1/+1
2023-12-12tcg: Reduce serial context atomicity earlierRichard Henderson2-12/+25
2023-11-21tcg/loongarch64: Fix tcg_out_mov() AbortedSong Gao1-0/+3
2023-11-06tcg/sparc64: Implement tcg_out_extrl_i64_i32Richard Henderson1-0/+5
2023-11-06tcg/optimize: Canonicalize sub2 with constants to add2Richard Henderson1-2/+19
2023-11-06tcg/optimize: Canonicalize subi to addi during optimizationRichard Henderson1-1/+13
2023-11-06tcg: Canonicalize subi to addi during opcode generationRichard Henderson1-16/+2