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authorJoseph Burt <caseorum@gmail.com>2024-01-21 21:14:39 +0000
committerRichard Henderson <richard.henderson@linaro.org>2024-01-23 13:32:10 +1000
commit9f6523e8e4689cafdbed7c10b7cf7c775b5a607b (patch)
tree14952b251f2af1ddf37a838904727544417369bd /tcg
parent0ea731db5a0edb5b1b9038e1c0059053e20ce5d3 (diff)
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tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct
When tcg_out_qemu_st_{index,direct} were merged, the direct case for MO_64 was omitted, causing qemu_st_i64 to be encoded as 0xffffffff due to underflow when adding h.base and h.index. Fixes: 1df6d611bdc2 ("tcg/arm: Introduce HostAddress") Signed-off-by: Joseph Burt <caseorum@gmail.com> Message-Id: <20240121211439.100829-1-caseorum@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/arm/tcg-target.c.inc3
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index fc78566..a9aa8aa 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1662,6 +1662,9 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp opc, TCGReg datalo,
} else {
tcg_out_strd_r(s, h.cond, datalo, h.base, h.index);
}
+ } else if (h.index < 0) {
+ tcg_out_st32_12(s, h.cond, datalo, h.base, 0);
+ tcg_out_st32_12(s, h.cond, datahi, h.base, 4);
} else if (h.index_scratch) {
tcg_out_st32_rwb(s, h.cond, datalo, h.index, h.base);
tcg_out_st32_12(s, h.cond, datahi, h.index, 4);