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2019-10-28tci: Add implementation for INDEX_op_ld16u_i64Stefan Weil1-0/+15
2019-10-14tcg/ppc: Update vector support for v3.00 dup/dupiRichard Henderson1-2/+26
2019-10-14tcg/ppc: Update vector support for v3.00 load/storeRichard Henderson1-9/+38
2019-10-14tcg/ppc: Update vector support for v3.00 AltivecRichard Henderson2-1/+24
2019-10-14tcg/ppc: Update vector support for v2.07 FPRichard Henderson1-6/+26
2019-10-14tcg/ppc: Update vector support for v2.07 VSXRichard Henderson1-0/+11
2019-10-14tcg/ppc: Update vector support for v2.07 AltivecRichard Henderson2-22/+67
2019-10-14tcg/ppc: Update vector support for VSXRichard Henderson2-6/+51
2019-10-14tcg/ppc: Enable Altivec detectionRichard Henderson1-0/+4
2019-10-14tcg/ppc: Support vector dup2Richard Henderson1-0/+9
2019-10-14tcg/ppc: Support vector multiplyRichard Henderson3-2/+121
2019-10-14tcg/ppc: Support vector shift by immediateRichard Henderson2-3/+57
2019-10-14tcg/ppc: Add support for vector saturated add/subtractRichard Henderson2-1/+37
2019-10-14tcg/ppc: Add support for vector add/subtractRichard Henderson1-0/+20
2019-10-14tcg/ppc: Add support for vector maximum/minimumRichard Henderson2-2/+40
2019-10-14tcg/ppc: Add support for load/store/logic/comparisonRichard Henderson2-34/+440
2019-10-14tcg/ppc: Enable tcg backend vector compilationRichard Henderson3-3/+89
2019-10-14tcg/ppc: Replace HAVE_ISEL macro with a variableRichard Henderson1-5/+12
2019-10-14tcg/ppc: Replace HAVE_ISA_2_06Richard Henderson1-3/+2
2019-10-14tcg/ppc: Create TCGPowerISA and have_isaRichard Henderson2-6/+14
2019-10-14tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC()Richard Henderson1-0/+5
2019-10-14tcg/ppc: Introduce macro VX4()Richard Henderson1-0/+1
2019-10-14tcg/ppc: Introduce Altivec registersRichard Henderson2-34/+65
2019-09-04Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into stagingPeter Maydell14-232/+143
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen14-232/+143
2019-09-03tcg/README: fix typo s/afterwise/afterwards/Emilio G. Cota1-1/+1
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com2-4/+6
2019-08-16Include qemu/main-loop.h lessMarkus Armbruster1-0/+1
2019-08-16Clean up inclusion of exec/cpu-common.hMarkus Armbruster3-3/+0
2019-07-14tcg/aarch64: Fix output of extract2 opcodesRichard Henderson1-1/+1
2019-07-14tcg: Fix constant folding of INDEX_op_extract2_i32Richard Henderson1-2/+2
2019-07-09tcg: Fix expansion of INDEX_op_not_vecRichard Henderson1-0/+6
2019-07-09tcg/riscv: Fix RISC-VH host build failureAlistair Francis1-2/+2
2019-07-05general: Replace global smp variables with smp machine propertiesLike Xu1-1/+12
2019-06-12Supply missing header guardsMarkus Armbruster2-0/+10
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster6-6/+0
2019-06-10tcg/arm: Remove mostly unreachable tlb special caseRichard Henderson1-11/+12
2019-06-10tcg/arm: Use LDRD to load tlb mask+tableRichard Henderson1-26/+40
2019-06-10tcg/aarch64: Use LDP to load tlb mask+tableRichard Henderson1-7/+8
2019-06-10cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson8-159/+59
2019-06-10tcg: Create struct CPUTLBRichard Henderson8-57/+19
2019-05-22tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/storeRichard Henderson1-2/+22
2019-05-22tcg/aarch64: Allow immediates for vector ORR and BICRichard Henderson1-7/+83
2019-05-22tcg/aarch64: Build vector immediates with two insnsRichard Henderson1-0/+47
2019-05-22tcg/aarch64: Use MVNI in tcg_out_dupi_vecRichard Henderson1-0/+11
2019-05-22tcg/aarch64: Split up is_fimmRichard Henderson1-84/+119
2019-05-22tcg/aarch64: Support vector bitwise select valueRichard Henderson2-2/+24
2019-05-22tcg/i386: Use umin/umax in expanding unsigned compareRichard Henderson1-19/+61
2019-05-22tcg/i386: Remove expansion for missing minmaxRichard Henderson1-37/+0
2019-05-22tcg/i386: Support vector comparison select valueRichard Henderson2-5/+36
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