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2014-03-14tcg-aarch64: Introduce tcg_out_insn_3401Richard Henderson1-46/+26
2014-03-14tcg-aarch64: Convert shift insns to tcg_out_insnRichard Henderson1-31/+21
2014-03-14tcg-aarch64: Introduce tcg_out_insnRichard Henderson1-36/+58
2014-03-08tcg-aarch64: Remove nop from qemu_st slow pathRichard Henderson1-7/+0
2014-03-08tcg-aarch64: Simplify tcg_out_ldst_9 encodingRichard Henderson1-12/+2
2014-03-08tcg-aarch64: Use intptr_t apropriatelyRichard Henderson1-28/+21
2014-03-08tcg-aarch64: Remove the shift_imm parameter from tcg_out_cmpRichard Henderson1-6/+5
2014-03-08tcg-aarch64: Hoist common argument loads in tcg_out_opRichard Henderson1-45/+50
2014-03-08tcg-aarch64: Don't handle mov/movi in tcg_out_opRichard Henderson1-13/+7
2014-03-08tcg-aarch64: Set ext based on TCG_OPF_64BITRichard Henderson1-21/+7
2014-03-08tcg-aarch64: Change all ext variables to TCGTypeRichard Henderson1-27/+37
2014-03-08tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS checkRichard Henderson1-6/+0
2014-03-02tcg: Fix typo in comment (dependancies -> dependencies)Stefan Weil1-1/+1
2014-02-21tcg/i386: Fix build for systems without working cpuid.h (MacOSX, Win32)Peter Maydell1-1/+3
2014-02-17tcg/i386: Use SHLX/SHRX/SARX instructionsRichard Henderson1-11/+50
2014-02-17tcg/i386: Use ANDN instructionRichard Henderson2-13/+45
2014-02-17tcg/i386: Add tcg_out_vex_modrmRichard Henderson1-3/+38
2014-02-17tcg/i386: Move TCG_CT_CONST_* to tcg-target.cRichard Henderson2-3/+4
2014-02-17tcg/optimize: Add more identity simplificationsRichard Henderson1-15/+24
2014-02-17tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0Richard Henderson1-0/+1
2014-02-17tcg/optimize: Simply some logical ops to NOTRichard Henderson1-0/+57
2014-02-17tcg/optimize: Handle known-zeros masks for ANDCRichard Henderson1-0/+11
2014-02-17tcg/optimize: add known-zero bits compute for load opsAurelien Jarno1-1/+25
2014-02-17tcg/optimize: improve known-zero bits for 32-bit opsAurelien Jarno1-0/+6
2014-02-17tcg/optimize: fix known-zero bits optimizationAurelien Jarno1-1/+7
2014-02-17tcg/optimize: fix known-zero bits for right shift opsAurelien Jarno1-5/+14
2014-02-17tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].Huw Davies1-1/+1
2014-02-15TCG: Fix 32-bit host allocation typoRichard Henderson1-1/+1
2014-02-08tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTRPeter Maydell1-0/+3
2014-02-01tcg/s390: Remove sigill_handlerRichard Henderson1-19/+0
2014-01-30Merge remote-tracking branch 'rth/tcg-movbe' into stagingPeter Maydell1-48/+97
2014-01-30TCG: Fix I64-on-32bit-host temporariesAlexander Graf1-1/+1
2014-01-25tcg/i386: cleanup useless #ifdefAurelien Jarno1-2/+0
2014-01-25tcg/i386: use movbe instruction in qemu_ldst routinesAurelien Jarno1-37/+80
2014-01-25tcg/i386: add support for three-byte opcodesAurelien Jarno1-8/+16
2014-01-25tcg/i386: remove hardcoded P_REXW valueAurelien Jarno1-1/+1
2013-12-21tcg/i386: fix a commentAurelien Jarno1-1/+1
2013-12-10tcg: Use bitmaps for free temporariesRichard Henderson2-22/+21
2013-11-30tcg-s390: Use qemu_getauxval in query_facilitiesRichard Henderson1-83/+12
2013-11-30tcg-arm: Use qemu_getauxvalRichard Henderson1-9/+5
2013-11-30tcg-ppc64: Use qemu_getauxvalRichard Henderson1-9/+2
2013-11-18tcg-ia64: Introduce tcg_opc_bswap64_iRichard Henderson1-35/+28
2013-11-18tcg-ia64: Introduce tcg_opc_ext_iRichard Henderson1-30/+24
2013-11-18tcg-ia64: Introduce tcg_opc_movi_aRichard Henderson1-16/+16
2013-11-18tcg-ia64: Introduce tcg_opc_mov_aRichard Henderson1-19/+16
2013-11-18tcg-ia64: Use A3 form of logical operationsRichard Henderson1-30/+34
2013-11-18tcg-ia64: Use SUB_A3 and ADDS_A4 for subtractionRichard Henderson1-2/+23
2013-11-18tcg-ia64: Use ADDS for small additionRichard Henderson1-4/+16
2013-11-18tcg-ia64: Avoid unnecessary stop bit in tcg_out_aluRichard Henderson1-11/+6
2013-11-18tcg-ia64: Move AREG0 to R32Richard Henderson2-9/+8
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