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| author | Richard Henderson <rth@twiddle.net> | 2014-03-04 08:52:49 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2014-03-08 21:23:25 -0800 |
| commit | 523fdc08ccc64d20e6cab1326635fb9ab864bf74 (patch) | |
| tree | 161a47f41c3f519470b4b2a605ddf622ea9aff39 /tcg | |
| parent | 017a86f7ad6da088927f7000c79388177d91a9ad (diff) | |
| download | qemu-523fdc08ccc64d20e6cab1326635fb9ab864bf74.zip qemu-523fdc08ccc64d20e6cab1326635fb9ab864bf74.tar.gz qemu-523fdc08ccc64d20e6cab1326635fb9ab864bf74.tar.bz2 | |
tcg-aarch64: Simplify tcg_out_ldst_9 encoding
At first glance the code appears to be using 1's compliment encoding,
a-la AArch32. Except that the constant is "off", creating a complicated
split field 2's compliment encoding.
Much clearer to just use a normal mask and shift.
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/aarch64/tcg-target.c | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 58a5ff3..d75d685 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -305,18 +305,8 @@ static inline void tcg_out_ldst_9(TCGContext *s, TCGReg rd, TCGReg rn, tcg_target_long offset) { /* use LDUR with BASE register with 9bit signed unscaled offset */ - unsigned int mod, off; - - if (offset < 0) { - off = (256 + offset); - mod = 0x1; - } else { - off = offset; - mod = 0x0; - } - - mod |= op_type; - tcg_out32(s, op_data << 24 | mod << 20 | off << 12 | rn << 5 | rd); + tcg_out32(s, op_data << 24 | op_type << 20 + | (offset & 0x1ff) << 12 | rn << 5 | rd); } /* tcg_out_ldst_12 expects a scaled unsigned immediate offset */ |