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AgeCommit message (Expand)AuthorFilesLines
2023-01-20tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldstRichard Henderson1-1/+1
2023-01-17tcg/riscv: Implement direct branch for goto_tbRichard Henderson1-2/+17
2023-01-17tcg/riscv: Introduce OPC_NOPRichard Henderson1-1/+2
2023-01-17tcg: Remove TCG_TARGET_HAS_direct_jumpRichard Henderson2-2/+0
2023-01-17tcg: Always define tb_target_set_jmp_targetRichard Henderson1-0/+6
2023-01-17tcg: Move tb_target_set_jmp_target declaration to tcg.hRichard Henderson1-4/+0
2023-01-17tcg: Change tb_target_set_jmp_target argumentsRichard Henderson1-1/+2
2023-01-17tcg: Split out tcg_out_goto_tbRichard Henderson1-9/+11
2023-01-17tcg: Introduce get_jmp_target_addrRichard Henderson1-1/+1
2023-01-17tcg: Replace asserts on tcg_jmp_insn_offsetRichard Henderson1-1/+1
2023-01-17tcg: Split out tcg_out_exit_tbRichard Henderson1-10/+12
2023-01-06Merge tag 'pull-riscv-to-apply-20230106' of https://github.com/alistair23/qem...Peter Maydell1-22/+46
2023-01-06tcg/riscv: Fix base register for user-only qemu_ld/stRichard Henderson1-17/+22
2023-01-06tcg/riscv: Fix reg overlap case in tcg_out_addsub2Richard Henderson1-2/+8
2023-01-06tcg/riscv: Fix range matched by TCG_CT_CONST_M12Richard Henderson1-3/+16
2023-01-05tcg: Add TCGHelperInfo argument to tcg_out_callRichard Henderson1-3/+4
2023-01-05tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32Richard Henderson1-0/+1
2023-01-05tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64Richard Henderson1-1/+5
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-2/+2
2022-02-09tcg/riscv: Support raising sigbus for user-onlyRichard Henderson2-4/+61
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-3/+3
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-8/+8
2021-10-05tcg: Expand MO_SIZE to 3 bitsRichard Henderson1-2/+2
2021-09-21tcg/riscv: Remove add with zero on user-only memory accessRichard Henderson1-8/+2
2021-07-09tcg: Remove TCG_TARGET_HAS_goto_ptrRichard Henderson1-1/+0
2021-06-29tcg/riscv: Remove MO_BSWAP handlingRichard Henderson1-31/+33
2021-06-11tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.hRichard Henderson1-0/+1
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson1-3/+1
2021-03-17tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina1-1/+2
2021-02-02tcg: Remove TCG_TARGET_CON_SET_HRichard Henderson1-1/+0
2021-02-02tcg/riscv: Split out constraint sets to tcg-target-con-set.hRichard Henderson3-60/+54
2021-02-02tcg: Remove TCG_TARGET_CON_STR_HRichard Henderson1-1/+0
2021-02-02tcg/riscv: Split out target constraints to tcg-target-con-str.hRichard Henderson3-39/+35
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson1-2/+0
2021-01-07tcg: Constify TCGLabelQemuLdst.raddrRichard Henderson1-2/+1
2021-01-07tcg: Constify tcg_code_gen_epilogueRichard Henderson1-2/+1
2021-01-07tcg: Remove TCG_TARGET_SUPPORT_MIRRORRichard Henderson1-1/+0
2021-01-07tcg/riscv: Support split-wx code generationRichard Henderson2-19/+24
2021-01-07tcg/riscv: Remove branch-over-branch fallbackRichard Henderson1-50/+6
2021-01-07tcg/riscv: Fix branch range checksRichard Henderson1-13/+15
2021-01-07tcg: Add --accel tcg,split-wx propertyRichard Henderson1-0/+1
2021-01-07tcg: Adjust tb_target_set_jmp_target for split-wxRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_register_jit for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_out_call for constRichard Henderson1-3/+3
2021-01-07tcg: Move tcg epilogue pointer out of TCGContextRichard Henderson1-2/+2
2021-01-07tcg: Introduce INDEX_op_qemu_st8_i32Richard Henderson1-0/+1
2021-01-06Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell1-5/+0
2021-01-04tcg/riscv: Fix illegal shift instructionsZihao Yu1-6/+6
2021-01-02util: Extract flush_icache_range to cacheflush.cRichard Henderson1-5/+0
2020-10-08tcg: Remove TCG_CT_REGRichard Henderson1-2/+0
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