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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-07-25 12:06:49 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-10-05 16:53:17 -0700 |
| commit | 9002ffcb7264947d9a193567b457dea42f15c321 (patch) | |
| tree | e2cb1ee1ad3036f4e6f7472d2411422536bd1fb7 /tcg/riscv | |
| parent | 4b473e0c60d802bb69accab3177d350fc580e2a4 (diff) | |
| download | qemu-9002ffcb7264947d9a193567b457dea42f15c321.zip qemu-9002ffcb7264947d9a193567b457dea42f15c321.tar.gz qemu-9002ffcb7264947d9a193567b457dea42f15c321.tar.bz2 | |
tcg: Rename TCGMemOpIdx to MemOpIdx
We're about to move this out of tcg.h, so rename it
as we did when moving MemOp.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/riscv')
| -rw-r--r-- | tcg/riscv/tcg-target.c.inc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index da48f9a..9b13a46 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -850,7 +850,7 @@ static void tcg_out_mb(TCGContext *s, TCGArg a0) #include "../tcg-ldst.c.inc" /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr, - * TCGMemOpIdx oi, uintptr_t ra) + * MemOpIdx oi, uintptr_t ra) */ static void * const qemu_ld_helpers[MO_SSIZE + 1] = { [MO_UB] = helper_ret_ldub_mmu, @@ -875,7 +875,7 @@ static void * const qemu_ld_helpers[MO_SSIZE + 1] = { }; /* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr, - * uintxx_t val, TCGMemOpIdx oi, + * uintxx_t val, MemOpIdx oi, * uintptr_t ra) */ static void * const qemu_st_helpers[MO_SIZE + 1] = { @@ -906,7 +906,7 @@ static void tcg_out_goto(TCGContext *s, const tcg_insn_unit *target) } static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl, - TCGReg addrh, TCGMemOpIdx oi, + TCGReg addrh, MemOpIdx oi, tcg_insn_unit **label_ptr, bool is_load) { MemOp opc = get_memop(oi); @@ -959,7 +959,7 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl, tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, TCG_REG_TMP2, addrl); } -static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi, +static void add_qemu_ldst_label(TCGContext *s, int is_ld, MemOpIdx oi, TCGType ext, TCGReg datalo, TCGReg datahi, TCGReg addrlo, TCGReg addrhi, @@ -980,7 +980,7 @@ static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi, static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { - TCGMemOpIdx oi = l->oi; + MemOpIdx oi = l->oi; MemOp opc = get_memop(oi); TCGReg a0 = tcg_target_call_iarg_regs[0]; TCGReg a1 = tcg_target_call_iarg_regs[1]; @@ -1012,7 +1012,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { - TCGMemOpIdx oi = l->oi; + MemOpIdx oi = l->oi; MemOp opc = get_memop(oi); MemOp s_bits = opc & MO_SIZE; TCGReg a0 = tcg_target_call_iarg_regs[0]; @@ -1104,7 +1104,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) { TCGReg addr_regl, addr_regh __attribute__((unused)); TCGReg data_regl, data_regh; - TCGMemOpIdx oi; + MemOpIdx oi; MemOp opc; #if defined(CONFIG_SOFTMMU) tcg_insn_unit *label_ptr[1]; @@ -1170,7 +1170,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) { TCGReg addr_regl, addr_regh __attribute__((unused)); TCGReg data_regl, data_regh; - TCGMemOpIdx oi; + MemOpIdx oi; MemOp opc; #if defined(CONFIG_SOFTMMU) tcg_insn_unit *label_ptr[1]; |