| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-11-09 | target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree | Luis Pires | 6 | -87/+68 |
| 2021-11-09 | target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetree | Luis Pires | 5 | -70/+69 |
| 2021-11-09 | target/ppc: Move dqua[q], drrnd[q] to decodetree | Luis Pires | 5 | -62/+47 |
| 2021-11-09 | target/ppc: Move dquai[q], drint{x,n}[q] to decodetree | Luis Pires | 5 | -58/+58 |
| 2021-11-09 | target/ppc: Move dcmp{u,o}[q],dts{tex,tsf,tsfi}[q] to decodetree | Luis Pires | 5 | -91/+83 |
| 2021-11-09 | target/ppc: Move d{add,sub,mul,div,iex}[q] to decodetree | Luis Pires | 5 | -70/+76 |
| 2021-11-09 | target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree | Luis Pires | 5 | -38/+37 |
| 2021-11-09 | target/ppc: Do not update nip on DFP instructions | Luis Pires | 1 | -8/+0 |
| 2021-11-09 | target/ppc: Implement DCTFIXQQ | Luis Pires | 4 | -0/+75 |
| 2021-11-09 | target/ppc: Implement DCFFIXQQ | Luis Pires | 5 | -0/+43 |
| 2021-11-09 | target/ppc: Introduce REQUIRE_FPU | Fernando Valle | 1 | -0/+8 |
| 2021-11-09 | target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c | Bruno Larsen | 2 | -9/+9 |
| 2021-11-09 | target/ppc: Implement pextd instruction | Matheus Ferst | 4 | -0/+32 |
| 2021-11-09 | target/ppc: Implement pdepd instruction | Matheus Ferst | 4 | -0/+34 |
| 2021-11-09 | target/ppc: Implement cnttzdm | Luis Pires | 2 | -4/+25 |
| 2021-11-09 | target/ppc: Implement cntlzdm | Luis Pires | 2 | -0/+37 |
| 2021-11-09 | target/ppc: Implement PLQ and PSTQ | Matheus Ferst | 2 | -0/+16 |
| 2021-11-09 | target/ppc: Move LQ and STQ to decodetree | Matheus Ferst | 3 | -151/+113 |
| 2021-11-09 | target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions | Fernando Eckhardt Valle | 2 | -0/+25 |
| 2021-11-09 | target/ppc: Move load and store floating point instructions to decodetree | Fernando Eckhardt Valle | 3 | -205/+95 |
| 2021-11-09 | target/ppc: move resolve_PLS_D to translate.c | Fernando Eckhardt Valle | 2 | -19/+19 |
| 2021-11-09 | target/ppc: introduce do_ea_calc | Fernando Eckhardt Valle | 2 | -9/+15 |
| 2021-11-08 | target-i386: mmu: fix handling of noncanonical virtual addresses | Paolo Bonzini | 1 | -9/+12 |
| 2021-11-08 | target-i386: mmu: use pg_mode instead of HF_LMA_MASK | Paolo Bonzini | 1 | -2/+2 |
| 2021-11-04 | Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211103' into staging | Richard Henderson | 38 | -47/+7557 |
| 2021-11-03 | Hexagon HVX (target/hexagon) import instruction encodings | Taylor Simpson | 4 | -0/+819 |
| 2021-11-03 | Hexagon HVX (target/hexagon) instruction decoding | Taylor Simpson | 4 | -2/+283 |
| 2021-11-03 | Hexagon HVX (target/hexagon) import semantics | Taylor Simpson | 4 | -0/+2804 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector stores | Taylor Simpson | 1 | -0/+218 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector loads | Taylor Simpson | 1 | -0/+150 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector splat and abs | Taylor Simpson | 1 | -0/+26 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector compares | Taylor Simpson | 1 | -0/+103 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector logical ops | Taylor Simpson | 1 | -0/+42 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector max/min | Taylor Simpson | 1 | -0/+34 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector shifts | Taylor Simpson | 1 | -0/+122 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector add & sub | Taylor Simpson | 1 | -0/+50 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides - vector assign & cmov | Taylor Simpson | 1 | -0/+31 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides for histogram instructions | Taylor Simpson | 1 | -0/+106 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper overrides infrastructure | Taylor Simpson | 6 | -9/+35 |
| 2021-11-03 | Hexagon HVX (target/hexagon) TCG generation | Taylor Simpson | 3 | -4/+311 |
| 2021-11-03 | Hexagon HVX (target/hexagon) helper functions | Taylor Simpson | 2 | -2/+296 |
| 2021-11-03 | Hexagon HVX (target/hexagon) instruction utility functions | Taylor Simpson | 3 | -0/+73 |
| 2021-11-03 | Hexagon HVX (target/hexagon) C preprocessor for decode tree | Taylor Simpson | 1 | -0/+13 |
| 2021-11-03 | Hexagon HVX (target/hexagon) semantics generator - part 2 | Taylor Simpson | 3 | -22/+360 |
| 2021-11-03 | Hexagon HVX (target/hexagon) semantics generator | Taylor Simpson | 2 | -0/+46 |
| 2021-11-03 | Hexagon HVX (target/hexagon) import macro definitions | Taylor Simpson | 3 | -0/+955 |
| 2021-11-03 | Hexagon HVX (target/hexagon) macros | Taylor Simpson | 2 | -0/+376 |
| 2021-11-03 | Hexagon HVX (target/hexagon) instruction attributes | Taylor Simpson | 1 | -0/+22 |
| 2021-11-03 | Hexagon HVX (target/hexagon) register names | Taylor Simpson | 2 | -1/+2 |
| 2021-11-03 | Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core | Taylor Simpson | 6 | -6/+200 |
