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Author
Files
Lines
2023-07-10
target/riscv: update cur_pmbase/pmmask based on mode affected by MPRV
Weiwei Li
2
-9
/
+25
2023-07-10
target/riscv: Add additional xlen for address when MPRV=1
Weiwei Li
3
-8
/
+55
2023-07-10
target/riscv/cpu.c: fix veyron-v1 CPU properties
Daniel Henrique Barboza
1
-0
/
+3
2023-07-10
target/riscv: Remove redundant assignment to SXL
Weiwei Li
1
-4
/
+0
2023-07-10
target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabled
Weiwei Li
1
-6
/
+4
2023-07-10
target/riscv: Make MPV only work when MPP != PRV_M
Weiwei Li
2
-2
/
+4
2023-07-10
disas/riscv: Add support for XThead* instructions
Christoph Müllner
1
-0
/
+11
2023-07-10
target/riscv: Factor out extension tests to cpu_cfg.h
Christoph Müllner
2
-25
/
+28
2023-07-10
target/riscv: Use xl instead of mxl for disassemble
LIU Zhiwei
1
-1
/
+2
2023-07-09
Merge tag 'pull-tcg-20230709' of https://gitlab.com/rth7680/qemu into staging
Richard Henderson
9
-365
/
+163
2023-07-09
target/riscv: Use aesdec_ISB_ISR_IMC_AK
Richard Henderson
1
-91
/
+10
2023-07-09
target/riscv: Use aesenc_SB_SR_MC_AK
Richard Henderson
1
-1
/
+6
2023-07-09
target/riscv: Use aesdec_IMC
Richard Henderson
1
-10
/
+5
2023-07-09
target/riscv: Use aesdec_ISB_ISR_AK
Richard Henderson
1
-1
/
+6
2023-07-09
target/riscv: Use aesenc_SB_SR_AK
Richard Henderson
1
-1
/
+9
2023-07-09
target/arm: Use aesdec_IMC
Richard Henderson
1
-19
/
+14
2023-07-09
target/arm: Use aesenc_MC
Richard Henderson
1
-1
/
+14
2023-07-09
target/arm: Use aesdec_ISB_ISR_AK
Richard Henderson
1
-21
/
+16
2023-07-09
target/arm: Use aesenc_SB_SR_AK
Richard Henderson
1
-1
/
+23
2023-07-08
target/arm: Demultiplex AESE and AESMC
Richard Henderson
6
-27
/
+41
2023-07-08
target/i386: Use aesdec_ISB_ISR_IMC_AK
Richard Henderson
1
-10
/
+6
2023-07-08
target/i386: Use aesenc_SB_SR_MC_AK
Richard Henderson
1
-9
/
+5
2023-07-08
target/i386: Use aesdec_IMC
Richard Henderson
1
-8
/
+3
2023-07-08
target/i386: Use aesdec_ISB_ISR_AK
Richard Henderson
1
-5
/
+5
2023-07-08
target/i386: Use aesenc_SB_SR_AK
Richard Henderson
1
-5
/
+6
2023-07-08
target/ppc: Use aesdec_ISB_ISR_AK_IMC
Richard Henderson
1
-15
/
+4
2023-07-08
target/ppc: Use aesenc_SB_SR_MC_AK
Richard Henderson
1
-10
/
+4
2023-07-08
target/ppc: Use aesdec_ISB_ISR_AK
Richard Henderson
1
-7
/
+1
2023-07-08
target/ppc: Use aesenc_SB_SR_AK
Richard Henderson
1
-7
/
+2
2023-07-08
target/arm: Move aesmc and aesimc tables to crypto/aes.c
Richard Henderson
1
-138
/
+5
2023-07-08
Merge tag 'trivial-patches-20230708' of https://gitlab.com/mjt0k/qemu into st...
Richard Henderson
1
-2
/
+2
2023-07-08
target/avr: Fix handling of interrupts above 33.
Lucas Dietrich
1
-2
/
+2
2023-07-07
Merge tag 'pull-ppc-20230707-1' of https://gitlab.com/danielhb/qemu into staging
Richard Henderson
13
-192
/
+296
2023-07-07
target/i386: Add new CPU model GraniteRapids
Tao Su
1
-0
/
+136
2023-07-07
target/i386: Add few security fix bits in ARCH_CAPABILITIES into SapphireRapi...
Lei Wang
1
-2
/
+11
2023-07-07
target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES
Tao Su
1
-0
/
+4
2023-07-07
target/i386: Allow MCDT_NO if host supports
Tao Su
1
-0
/
+4
2023-07-07
target/i386: Add support for MCDT_NO in CPUID enumeration
Tao Su
2
-0
/
+30
2023-07-07
target/i386: Adjust feature level according to FEAT_7_1_EDX
Tao Su
1
-0
/
+1
2023-07-07
target/ppc: Remove pointless checks of CONFIG_USER_ONLY in 'kvm_ppc.h'
Philippe Mathieu-Daudé
1
-5
/
+0
2023-07-07
target/ppc: Restrict 'kvm_ppc.h' to sysemu in cpu_init.c
Philippe Mathieu-Daudé
1
-1
/
+1
2023-07-07
target/ppc: Define TYPE_HOST_POWERPC_CPU in cpu-qom.h
Philippe Mathieu-Daudé
2
-2
/
+2
2023-07-07
target/ppc: Move CPU QOM definitions to cpu-qom.h
Philippe Mathieu-Daudé
2
-4
/
+4
2023-07-07
target/ppc: Reorder #ifdef'ry in kvm_ppc.h
Philippe Mathieu-Daudé
1
-34
/
+28
2023-07-07
target/ppc: Have 'kvm_ppc.h' include 'sysemu/kvm.h'
Philippe Mathieu-Daudé
1
-0
/
+1
2023-07-07
target/ppc: Machine check on invalid real address access on POWER9/10
Nicholas Piggin
3
-0
/
+55
2023-07-07
target/ppc: SMT support for the HID SPR
Nicholas Piggin
5
-1
/
+40
2023-07-07
target/ppc: Add LPAR-per-core vs per-thread mode flag
Nicholas Piggin
5
-5
/
+33
2023-07-07
target: ppc: Use MSR_HVB bit to get the target endianness for memory dump
Narayana Murty N
1
-1
/
+1
2023-07-07
target/ppc: Get CPUState in one step
BALATON Zoltan
1
-8
/
+7
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