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2021-03-05Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into...Peter Maydell4-3/+20
2021-03-04target-riscv: support QMP dump-guest-memoryYifei Jiang5-0/+210
2021-03-04target/riscv: Declare csr_ops[] with a known sizeBin Meng1-1/+1
2021-03-04target/s390x/kvm: Simplify debug codePhilippe Mathieu-Daudé1-2/+1
2021-03-04css: SCHIB measurement block origin must be alignedPierre Morel1-0/+6
2021-03-04target/s390x/arch_dump: Fix warning for the name field in the PT_NOTE sectionThomas Huth1-1/+3
2021-03-04s390x/cpu_model: disallow unpack for --only-migratableChristian Borntraeger1-0/+10
2021-03-02Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell3-3/+6
2021-02-25tcg/i386: rdpmc: fix the the condtionsZheng Zhan Liang1-1/+2
2021-02-25target/i386: Add bus lock debug exception supportChenyi Qiang2-1/+3
2021-02-25target/i386: update to show preferred boolean syntax for -cpuDaniel P. Berrangé1-1/+1
2021-02-22target/cris: Plug leakage of TCG temporariesStefan Sandstrom2-59/+135
2021-02-22target/cris: Let cris_mmu_translate() use MMUAccessType access_typePhilippe Mathieu-Daudé2-13/+13
2021-02-22target/cris: Use MMUAccessType enum type when possiblePhilippe Mathieu-Daudé2-9/+8
2021-02-21Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ...Peter Maydell7-122/+123
2021-02-21target/mips: Use GPR move functions in gen_HILO1_tx79()Philippe Mathieu-Daudé1-17/+4
2021-02-21target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpersPhilippe Mathieu-Daudé2-0/+22
2021-02-21target/mips: Rename 128-bit upper halve GPR registersPhilippe Mathieu-Daudé1-1/+3
2021-02-21target/mips: Promote 128-bit multimedia registers as global onesPhilippe Mathieu-Daudé3-27/+34
2021-02-21target/mips: Make cpu_HI/LO registers publicPhilippe Mathieu-Daudé2-1/+2
2021-02-21target/mips: Include missing "tcg/tcg.h" headerPhilippe Mathieu-Daudé1-0/+1
2021-02-21target/mips: Remove unused 'rw' argument from page_table_walk_refill()Philippe Mathieu-Daudé1-3/+3
2021-02-21target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessTypePhilippe Mathieu-Daudé2-10/+10
2021-02-21target/mips: Let get_seg*_physical_address() take MMUAccessType argPhilippe Mathieu-Daudé1-5/+6
2021-02-21target/mips: Let get_physical_address() take MMUAccessType argumentPhilippe Mathieu-Daudé1-10/+10
2021-02-21target/mips: Let raise_mmu_exception() take MMUAccessType argumentPhilippe Mathieu-Daudé1-5/+5
2021-02-21target/mips: Let cpu_mips_translate_address() take MMUAccessType argPhilippe Mathieu-Daudé2-4/+4
2021-02-21target/mips: Let do_translate_address() take MMUAccessType argumentPhilippe Mathieu-Daudé1-3/+4
2021-02-21target/mips: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé2-2/+2
2021-02-21target/mips: Remove unused MMU definitionsPhilippe Mathieu-Daudé1-16/+0
2021-02-21target/mips: Remove access_type argument from get_physical_address()Philippe Mathieu-Daudé1-13/+9
2021-02-21target/mips: Remove access_type arg from get_segctl_physical_address()Philippe Mathieu-Daudé1-10/+10
2021-02-21target/mips: Remove access_type argument from get_seg_physical_addressPhilippe Mathieu-Daudé1-3/+3
2021-02-21target/mips: Remove access_type argument from map_address() handlerPhilippe Mathieu-Daudé2-12/+11
2021-02-21target/mips: fetch code with translator_ldPhilippe Mathieu-Daudé1-10/+10
2021-02-20target/avr/cpu: Use device_class_set_parent_realize()Philippe Mathieu-Daudé1-3/+1
2021-02-18i386: Add the support for AMD EPYC 3rd generation processorsBabu Moger2-1/+110
2021-02-18Hexagon build infrastructureTaylor Simpson2-0/+192
2021-02-18Hexagon (target/hexagon) translationTaylor Simpson2-0/+841
2021-02-18Hexagon (target/hexagon) TCG for floating point instructionsTaylor Simpson1-0/+121
2021-02-18Hexagon (target/hexagon) TCG for instructions with multiple definitionsTaylor Simpson1-0/+198
2021-02-18Hexagon (target/hexagon) TCG generationTaylor Simpson2-0/+356
2021-02-18Hexagon (target/hexagon) instruction classesTaylor Simpson3-0/+174
2021-02-18Hexagon (target/hexagon) macrosTaylor Simpson1-0/+592
2021-02-18Hexagon (target/hexagon) opcode data structuresTaylor Simpson2-0/+200
2021-02-18Hexagon (target/hexagon) generater phase 4 - decode treeTaylor Simpson1-0/+351
2021-02-18Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode treeTaylor Simpson1-0/+188
2021-02-18Hexagon (target/hexagon) generator phase 2 - generate header filesTaylor Simpson10-0/+1565
2021-02-18Hexagon (target/hexagon) generator phase 1 - C preprocessor for semanticsTaylor Simpson1-0/+88
2021-02-18Hexagon (target/hexagon/imported) arch importTaylor Simpson14-0/+9236