riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-11-23	target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0	Peter Maydell	1	-4/+8
2020-11-23	target/arm: fix stage 2 page-walks in 32-bit emulation	Rémi Denis-Courmont	1	-2/+2
2020-11-18	s390/kvm: fix diag318 propagation and reset functionality	Collin Walling	5	-5/+30
2020-11-18	hvf: Fix segment selector format	Jessica Clarke	1	-4/+4
2020-11-18	hvf: Gate RDTSCP on CPU_BASED2_RDTSCP, not just CPU_BASED_TSC_OFFSET	Jessica Clarke	1	-0/+4
2020-11-17	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201117'...	Peter Maydell	1	-3/+0
2020-11-17	Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-11-1...	Peter Maydell	1	-1/+2
2020-11-17	target/openrisc: Remove dead code attempting to check "is timer disabled"	Peter Maydell	1	-3/+0
2020-11-17	target/microblaze: Fix possible array out of bounds in mmu_write()	AlexChen	1	-1/+2
2020-11-16	target/i386: avoid theoretical leak on MCE injection	Paolo Bonzini	1	-6/+4
2020-11-16	kvm/i386: Set proper nested state format for SVM	Tom Lendacky	1	-4/+6
2020-11-15	nomaintainer: Fix Lesser GPL version number	Chetan Pant	5	-5/+5
2020-11-15	sparc tcg cpus: Fix Lesser GPL version number	Chetan Pant	12	-12/+12
2020-11-15	x86 hvf cpus: Fix Lesser GPL version number	Chetan Pant	17	-18/+18
2020-11-15	overall/alpha tcg cpus\|hppa: Fix Lesser GPL version number	Chetan Pant	18	-18/+18
2020-11-15	arm tcg cpus: Fix Lesser GPL version number	Chetan Pant	30	-30/+30
2020-11-15	x86 tcg cpus: Fix Lesser GPL version number	Chetan Pant	21	-21/+21
2020-11-15	tricore tcg cpus: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-11-15	xtensa tcg cpus: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-11-15	microblaze tcg cpus: Fix Lesser GPL version number	Chetan Pant	8	-8/+8
2020-11-15	cris tcg cpus: Fix Lesser GPL version number	Chetan Pant	10	-10/+10
2020-11-15	powerpc tcg: Fix Lesser GPL version number	Chetan Pant	24	-24/+24
2020-11-13	hmp: Pass monitor to mon_get_cpu_env()	Kevin Wolf	8	-16/+16
2020-11-13	hmp: Pass monitor to MonitorDef.get_value()	Kevin Wolf	3	-7/+14
2020-11-13	hmp: Pass monitor to mon_get_cpu()	Kevin Wolf	1	-1/+1
2020-11-10	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201110'...	Peter Maydell	8	-55/+44
2020-11-10	Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-11-1...	Peter Maydell	1	-4/+4
2020-11-10	target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check	Peter Maydell	1	-4/+4
2020-11-10	target/arm: Fix neon VTBL/VTBX for len > 1	Richard Henderson	3	-40/+29
2020-11-10	target/arm: add space before the open parenthesis '('	Xinhao Zhang	1	-1/+1
2020-11-10	target/arm: Don't use '#' flag of printf format	Xinhao Zhang	1	-2/+2
2020-11-10	target/arm: add spaces around operator	Xinhao Zhang	3	-9/+9
2020-11-10	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201...	Peter Maydell	8	-255/+112
2020-11-10	s390x: fix clang 11 warnings in cpu_models.c	Daniele Buono	1	-4/+4
2020-11-09	target/riscv: Split the Hypervisor execute load helpers	Alistair Francis	3	-42/+17
2020-11-09	target/riscv: Remove the hyp load and store functions	Alistair Francis	5	-166/+59
2020-11-09	target/riscv: Remove the HS_TWO_STAGE flag	Alistair Francis	4	-51/+25
2020-11-09	target/riscv: Set the virtualised MMU mode when doing hyp accesses	Alistair Francis	1	-13/+17
2020-11-09	target/riscv: Add a virtualised MMU Mode	Alistair Francis	3	-3/+14
2020-11-09	target/mips: Fix PageMask with variable page size	Jiaxun Yang	2	-6/+22
2020-11-06	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201106' into staging	Peter Maydell	2	-35/+50
2020-11-05	target/s390x: fix execution with icount	Pavel Dovgalyuk	2	-35/+50
2020-11-05	target/ppc/excp_helper: Add a fallthrough for fix compiler warning	Chen Qun	1	-0/+1
2020-11-04	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201103'...	Peter Maydell	11	-13/+13
2020-11-03	target/mips: Add unaligned access support for MIPS64R6 and Loongson-3	Huacai Chen	1	-2/+2
2020-11-03	target/mips: Fix Lesser GPL version number	Chetan Pant	11	-11/+11
2020-11-03	target/riscv/csr.c : add space before the open parenthesis '('	Xinhao Zhang	1	-1/+1
2020-11-03	target/riscv: Add V extension state description	Yifei Jiang	1	-0/+25
2020-11-03	target/riscv: Add H extension state description	Yifei Jiang	1	-0/+47
2020-11-03	target/riscv: Add PMP state description	Yifei Jiang	3	-11/+70